Edit : I solved the problem. The problem was related to variable declaritions and pointer. None of the commands was not working except Write Register and Read Register.
I had declared commands in the form of
#define COMD_XX_XX (uint8_t) 0x00
in header file.
When I tried to Flush RX or Read Payload I used the following ;
HAL_SPI_Transmit(&hspi1, (uint8_t*)COMD_XX_XX, 1, 1 );
(uint8_t*)COMD_XX_XX --> This was the root of my problem.
I declared new global variables for commands in .c extended file then tried the following
HAL_SPI_Transmit(&hspi1, &COMD_XX_XX, 1, 1 );
and all problems vanished !
Hi all.
I have been trying to write my own code for NRF24L01+. I have problems and I can not solve them
As a receiver, I use STM32F103C8T6 and as a transmitter I use Arduino Uno.
The problems are related to RX and Flush Operations.
Both sides;
- Are communicationg through the same address.
- Have the same CRC Length
- Do not use Enhanced Mode and ACK
- Have the same address width
- Have the same payload width
- have the same communication data rate. (1Mbps)
Here is the algorithm I use to get coming data from TX device.
A. IF I USE IRQ PIN
- wait until NRF24 sends active low signal through IRQ pin
- Bring CE low
- Read FIFO through READ_RX_PAYLOAD command
- Clear Interrupts (RX_DR etc.)
- Flush RX FIFO
- Set CE high
void RX_Mode()
{
ChipEnable_high(); // receiver monitors for a data
while(HAL_GPIO_ReadPin(GPIOA,GPIO_PIN_2)!=0); // wait until IRQ occurs
ChipEnable_low();
//read the payload
csn_low(); //CSN=0
HAL_SPI_TransmitReceive(&hspi1, (uint8_t *)COMD_R_RX_PAYLOAD, &received_data,1, 1500); // READ RX FIFO
while(HAL_SPI_GetState(&hspi1) != HAL_SPI_STATE_READY);
csn_high(); // CSN=1
CDC_Transmit_FS(&received_data,1); // print the received data out
//clear interrupt bits and flush rx fifo
ClearInterrupts();
Flush_RX();
}
EDIT : I've executed R_RX_PAYLOAD command after RX_DR bit is set and it returns content of STATUS register. I mean when a data arrives STATUS register becomes 0x0B and when I execute read payload command I get 0x0B. What am I doing wrong ?
B.IF I DO NOT USE IRQ PIN
- wait until RX_DR bit is set
- Bring CE low
- Read FIFO through READ_RX_PAYLOAD command
- Clear Interrupts
- Flush RX FIFO
- Set CE high
But I can not get it worked. Then I realize that Flush RX Command does not work.
I keep reading registers while transmitter is sending data and I can observe that a new data arrives RX FIFO which means RX_DR bit is set and RX_FIFO status is changed. Then I turn the tx off and execute FLUSH_RX command on the rx side, can not flush fifo. The registers still say that there is data in RX FIFO.
Here is the code to flush RX FIFO
void Flush_TX()
{
csn_low();
HAL_SPI_Transmit(&hspi1, (uint8_t *)COMD_FLUSH_TX, 1, 150);
while( (HAL_SPI_GetState(&hspi1) != HAL_SPI_STATE_READY) );
csn_high();
}
Any suggestion, help, guidance will be appreciated. Thanks in advance.
