Read GPIO throughout system startup (even nrf_sdh_enable_request)?

[vvv]

I'm working on a custom BLE keyboard (starting from the ble_app_hids_keyboard example, S132, seeedstudio nRF52840-mdk board, SDK v15.1.0).

The system is configured to wake up from nrf_gpio_cfg_sense_input on the keyboard switch pins. Then, in normal operation, I'm scanning for keypresses using an app timer (every 25 ticks, using nrf_gpio_pin_read). 

Now I'm trying to implement that the first couple of keypresses that wake up the system and those during system initialisation are not lost, but are buffered and sent once connection is established.

This was easily implemented using the FIFO library, and by starting the app timer for the scan task as soon as possible in the main function.

However, I've noticed that while it usually gets the first and last keypresses during boot, it misses some inbetween. I've narrowed it down to the nrf_sdh_enable_request function, during which my app timer task is not executed. This function blocks the system for +/-300ms, which seems to be due to the startup time of the external crystal.

I've successfully achieved the desired behavior by using the internal clock instead (RC), which just takes a couple of ms to startup. However, I understand this is not recommended for battery operated devices and radio due to power consumption and clock precision.

Is it possible to somehow perform/buffer GPIO pin reads while nrf_sdh_enable_request is waiting for the crystal to be ready?

So far it seems like app timers or lower level RTC solutions may not be able to be configured with a high enough priority to interrupt the SD task?

I'm also not sure if switching to the crystal clock at a later point in time is a viable solution, as there might not be an opportune moment to block the system once the user starts typing.

[Kenneth]

Hi,

While softdevice is starting up the external 32KHz crystal it will remain in interrupt priority 4, as shown here:
http://infocenter.nordicsemi.com/topic/com.nordic.infocenter.s132.sds/dita/softdevices/s130/processor_avail_interrupt_latency/exception_mgmt_sd.html?cp=2_3_1_0_15_1 

This means that your timer must run in interrupt priority 2 or 3 to read the GPIO's during this period.

Alternatively you may manually startup the external 32KHz prior to enable softdevice, e.g.:

NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->TASKS_LFCLKSTART = 1;
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
{
}
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;

// Enable softdevice with external 32kHz crystal.

Best regards,
Kenneth

[vvv]

brilliant, thank you!