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nRF52832-CIAA HDI PCB layout tips

Hello,

We have plan to use nRF52832-CIAA with external antenna connector (MHF4).  I noticed that in 4-layer reference design layout there is quite big square keepouts on inner layers 2(GND) and 3 (VDD) under C3/L1 tuning components.

Our HDI PCB is under design. We have short "RF" trace from L1 to antenna connector pin and now its time to calculate trace width to match impedance to 50ohms.  Because of those keepout in inner layers, there can't be solid reference plane on layer2 (for RF trace).

1. Can we "shrink" keepout from layer2  to get more solid copper for reference?

2. Or is it better to have keepouts  and use layer 4 as reference layer  ->RF trace width increases a lot. How wide keepout (on layers 2 &3) must be under RF trace?

Do you have tips how to go forward?

 BR

Markku

  • Hi,

     

    Yes, you can shrink the internal layer keepout. This of course increases deviation between the reference design and your design, increasing the likelyhood of difference in performance also. You should however always test RF performance and adjust C3/L1 accordingly. This will make up most of the performance deviation.

    Using layer 2/3 as reference ground underneath the RF part can cause harmonics to increase a bit, but as mentioned this can be mitigated by tuning L1/C3. If you need to use layer 4 for routing/components, then the keepout should be removed in either Layer 2 or 3. If layer 4 is free for reference ground, then using this is recommended, but it is not critical.

     

    Feel free to submit your design in a private case for a free review. I am not able to provide more concise feedback and recommendations without actually seeing the design.

     

    Best regards,

    Andreas

  • The big reason for the keepout is that HDI boards normally have about a 3 mil outer layer dielectric with a big core.  The dielectric needs to be thin so the laser can burn through. With 3 mil and a healthy trace to ground pour spacing even a 10 mil trace will give a 33ohm characteristic impedance.

    Plus since the tolerance is normally +/- some fixed mil amount. This means board to board impedance changes will be large even it you spec a characterized board.

    So, much easier and repeatable to do a ground keepout on inner layers and then use bottom as ground reference for top and traditional coplanar with ground configuration for the strip.

  • Thank you. One more thing. If we use layer 4 as reference, how wide keepouts must be on inner layers under antenna trace?  If antenna trace on top layer is for example 10mils?

  • Hi,

     

    It should not be less narrow than the opening in the 'opening' for the coplanar center conductor in the top layer, width of trace + 2*spacing. It can be wider if you need for some reason, but if more narrow you risk it changing CPW properties. Then it could be better to just omit the internal keepout entirely. As mentioned you will then need to reduce trace/spacing dimensions to raise the impedance, but at least you know what you are dealing with, and you might not consider the possible performance hit as critical anyway.

     

    Best regards,

    Andreas

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