RTC1 interrupt not triggering

[obbe]

I'm having some trouble getting interrupt from RTC1. I'm initialising as follows.

// Enable LF clock
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->CTIV = CLOCK_CTIV_CTIV_Msk;
NRF_CLOCK->TASKS_LFCLKSTART = 1U;

// Do some other stuff...

// Wait for LF clock to be running
while ((NRF_CLOCK->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk) !=
           (CLOCK_LFCLKSTAT_STATE_Running << CLOCK_LFCLKSTAT_STATE_Pos)) {
    continue;
}

// Clear all interrupts and events
NRF_RTC1->INTENCLR =
    (RTC_INTENCLR_TICK_Clear << RTC_INTENCLR_TICK_Pos) |
    (RTC_INTENCLR_OVRFLW_Clear << RTC_INTENCLR_OVRFLW_Pos) |
    (RTC_INTENCLR_COMPARE0_Clear << RTC_INTENCLR_COMPARE0_Pos) |
    (RTC_INTENCLR_COMPARE1_Clear << RTC_INTENCLR_COMPARE1_Pos) |
    (RTC_INTENCLR_COMPARE2_Clear << RTC_INTENCLR_COMPARE2_Pos) |
    (RTC_INTENCLR_COMPARE3_Clear << RTC_INTENCLR_COMPARE3_Pos);
NRF_RTC1->EVTENCLR =
    (RTC_EVTENCLR_TICK_Clear << RTC_EVTENCLR_TICK_Pos) |
    (RTC_EVTENCLR_OVRFLW_Clear << RTC_EVTENCLR_OVRFLW_Pos) |
    (RTC_EVTENCLR_COMPARE0_Clear << RTC_EVTENCLR_COMPARE0_Pos) |
    (RTC_EVTENCLR_COMPARE1_Clear << RTC_EVTENCLR_COMPARE1_Pos) |
    (RTC_EVTENCLR_COMPARE2_Clear << RTC_EVTENCLR_COMPARE2_Pos) |
    (RTC_EVTENCLR_COMPARE3_Clear << RTC_EVTENCLR_COMPARE3_Pos);

// Set prescaler
// 32.768kHz / (2^12 - 1) = 8Hz
NRF_RTC1->PRESCALER = 0xFFFF;

// Enable tick interrupt
NRF_RTC1->EVTENSET = (RTC_EVTENSET_TICK_Set << RTC_EVTENSET_TICK_Pos);
NRF_RTC1->INTENSET = (RTC_INTENSET_TICK_Set << RTC_INTENSET_TICK_Pos);

// Start RTC
NRF_RTC1->TASKS_START = 1U;

// Configure and enable SoftDevice
nrf_clock_lf_cfg_t clock_cfg;
clock_cfg.source = NRF_CLOCK_LF_SRC_RC;
clock_cfg.rc_ctiv = kTempChangedCalibrationInterval;
clock_cfg.rc_temp_ctiv = kForcedCalibrationInterval;
sd_softdevice_enable(&clock_cfg, &NrfFaultHandler);

I have an interrupt function as follows.

void RTC1_IRQHandler(void) {
    BREAKPOINT;
}

I'm using the gcc_startup-script. We're not using the SDK. I'm not getting any errors from SoftDevice and everything seems to behave nicely.

However, I'm not getting any interrupts. I've tried checking if RTC1's counter is incrementing, but something seems to be afoul with my debugger as it reads all registers as default values (although breakpoints and reading variables works). Am I missing some step here?

Edit SoftDevice S132 v3.0.0

---

Ok - I was missing NVIC_EnableIRQ(RTC1_IRQn). Which reformulates my question to what is the difference between NVIC_EnableIRQ and INTENSET register?

[Turbo J]

INTENSET set which events can trigger the RTC1_IRQ.

NVIC_EnableIRQ() determenes wheter the RTC1_IRQ line can interrupt the CPU core at all.

There are cases when you don't want specific interrupts to occur.

Remember to use NVIC_SetPriority(), this is required for softdevice - the default priority zero is not available for application.

[obbe]

Thanks for your answer. I'm curious what the reasoning is that you need to both enable the interrupts and set the flags? In other architectures I've used you only needed enabling the specific interrupt you were interested in (even if the interrupt routine was the same for multiple sources).