Hardware-Driven Interrupt wake-up

[Roger_PiSq]

Would like to know how quickly the nRF51822 evaluation board wakes-up, after receiving an external hardware interrupt.  Speifically, how fast can the evaluation begin making A/D measurements after waking-up from an external interrupt?  The initial conditions (I would think) would include setting-up the A/D prior to initiating sleep.  Would you please direct me to what examples there may be about hardware interrupt handling?  Thank you for your help.

[Jørgen Holmefjord]

Hi,

I assume you are talking about wakeup from System OFF sleep mode? The wakeup time is given in the product specifications:

If you want to measure time until you are done setting up ADC, you need to measure this yourself. Set a GPIO at the point where you are done with configuration, and measure the time between the interrupt pin rise and the GPIO using a logic analyzer.

In the SDK there is a pin change interrupt example, but this does not go to System OFF mode. These examples on our GitHub might be helpful.

Best regards,
Jørgen

[Roger_PiSq]

Thank you Jørgen.

I hadn't found the tOFF2ON reference you provided (OFF to CPU execute. 9.6 10.6μs).  I would have thought that "OFF" means not powered.  Is this a reference to interrupt driven wake-up time?

I had seen the "4.2 μs wake-up" (using 16 MHz RCOSC) and some nRF51822 wake-up blog discussions.  The difference between 9.6μs (OFF to CPU execute) and 4.2μs (wake-up) would make sense from the stand-point of less time needed for wakeup (than turn-on, from off) execution readiness.

If I have the right understanding of the basic difference between 4.2μs versus 9.6μs (see above), then I would like to know if "wake-up" also means that the CPU is ready to execute, with all system resources available and ready for immediate use.  (i.e. What is the state of readiness when wake-up has been achieved?)

Is there a timing diagram of A/D measurement initiation (by code) - to - A/D measurement completion?

I will do as you suggest, related to making specific timing measurements.  Thank you very much for your reply, and the examples.

-Roger

[Jørgen Holmefjord]

The 4.2us timing you refer to is Startup time for the 16MHz RC oscillator when in System ON (HFCLK stopped) to CPU execute, which is typical 4.2us, maximum 5.2us as specified in table 24 on page 43. System ON and System OFF are different sleep modes, see page 44 of the Reference Manual.

[Roger_PiSq]

Thank you again Jørgen.

Is there a timing diagram of A/D measurement initiation (by code) - to - A/D measurement completion?

If not, I will use the GPIO stimulus method you described, to measure the time intervals between process steps.

Have a good evening.

-Roger

[Jørgen Holmefjord]

The timing specifications for ADC is given on page 61 of the product specifications.