NRF52832 unexpected PWM rate

[lo]

Hello,

I am using hardware PWM on NRF52832 in order to drive a MOS. I found something unexpected with the rates. i understand the PWM rate is determined by the clock divider and the counterTop value, which can be considered as the resoution in bit. So i generated a table of all available rates from DIV1 to DIV128 and from 15 bit to 4 bit resolution :

            15 14  13   12   11   10    9     8     7      6      5      4
 DIV_128    61 122 244  488  976  1953  3906  7812  15625  31250  62500  125000
 DIV_64     69 139 279  558  1116 2232  4464  8928  17857  35714  71428  142857
 DIV_32     81 162 325  651  1302 2604  5208  10416 20833  41666  83333  166666
 DIV_16     97 195 390  781  1562 3125  6250  12500 25000  50000  100000 200000
 DIV_8     122 244 488  976  1953 3906  7812  15625 31250  62500  125000 250000
 DIV_4     162 325 651  1302 2604 5208  10416 20833 41666  83333  166666 333333
 DIV_2     244 488 976  1953 3906 7812  15625 31250 62500  125000 250000 500000
 DIV_1     488 976 1953 3906 7812 15625 31250 62500 125000 250000 500000 1000000

But the table doesnt match with actual measured values, here are few rates i measured:

div128, 15bit = 3.78 Hz

div16, 15bit = 30.2 Hz

div1, 15bit = 483 Hz

While it it close in the whole range for DIV_1, it really doesnt match-up for DIV_16 and DIV_128, so i wonder what is the reason for this and how to calculate properly the PWM rates? here is what i used:

f = ((16000000 / divider ) / maxValueForResolution(bitResolution))

Thanks

[MartinBL]

Hi,

I'm not sure what you are doing wrong, but the values in your table look wrong. Your formula looks alright, but when I run the numbers I get:

		Bit width and Counter Top
		15	14	13	12	11	10	9	8	7	6	5	4
Divider (Prescaler)	F_PWM_CLK	32767	16383	8191	4095	2047	1023	511	255	127	63	31	15
128	125000	3.815	7.630	15.261	30.525	61.065	122.190	244.618	490.196	984.252	1984.127	4032.258	8333.333
64	250000	7.630	15.260	30.521	61.050	122.130	244.379	489.237	980.392	1968.504	3968.254	8064.516	16666.667
32	500000	15.259	30.519	61.043	122.100	244.260	488.759	978.474	1960.784	3937.008	7936.508	16129.032	33333.333
16	1000000	30.519	61.039	122.085	244.200	488.520	977.517	1956.947	3921.569	7874.016	15873.016	32258.065	66666.667
8	2000000	61.037	122.078	244.170	488.400	977.040	1955.034	3913.894	7843.137	15748.031	31746.032	64516.129	133333.333
4	4000000	122.074	244.156	488.341	976.801	1954.079	3910.068	7827.789	15686.275	31496.063	63492.063	129032.258	266666.667
1	16000000	488.296	976.622	1953.363	3907.204	7816.317	15640.274	31311.155	62745.098	125984.252	253968.254	516129.032	1066666.667

These values seem pretty spot on when I test with a logic analyzer. 

PS: Remember that the tolerance of your PWM frequency will only ever be as accurate as your high frequency clock source. So if you rely on the internal HF RC Oscillator (HFINT) your accuracy can be off by as much as 6 %.

[lo]

Thank you for the return, indeed the wrong values were due to the rounding in the function which printed the table and a wrong prescaler (div_2), my bad. Yes i am aware that overall accuracy of PWM frequency is determined by the HF oscillator accuracy, i use a 5ppm one.