Hi, I am trying to interface MPU^)%) sensor with NRF52832. with help of BLE UART. i will get the resultant data on BLE APP. but here i got some error is this the linking error or ?
Hi, I am trying to interface MPU^)%) sensor with NRF52832. with help of BLE UART. i will get the resultant data on BLE APP. but here i got some error is this the linking error or ?
Hi Sunil.
Have you enabled NRFX_TWI_ENABLED in sdk_config.h?
Like this:
// <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 1 #endif
- Andreas
Hi Andreas
I have enabled that one
/ <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver
//==========================================================
#ifndef NRFX_TWI_ENABLED
#define NRFX_TWI_ENABLED 1
#endif
// <q> NRFX_TWI0_ENABLED - Enable TWI0 instance
#ifndef NRFX_TWI0_ENABLED
#define NRFX_TWI0_ENABLED 0
#endif
// <q> NRFX_TWI1_ENABLED - Enable TWI1 instance
#ifndef NRFX_TWI1_ENABLED
#define NRFX_TWI1_ENABLED 0
#endif
// <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer
//==========================================================
#ifndef TWI_ENABLED
#define TWI_ENABLED 1
#endif
// <o> TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
// <26738688=> 100k
// <67108864=> 250k
// <104857600=> 400k
Hi,
even though that I enabled the NRFX_TWI0_ENABLED as 1, errors are coming.
Hi.
There appears to be an overwrite of the config in sdk_config.h by the file apply_old_config.h.
If you have the following config, it should work:
// <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 1 #endif // <q> NRFX_TWI0_ENABLED - Enable TWI0 instance #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 1 #endif // <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer //========================================================== #ifndef TWI_ENABLED #define TWI_ENABLED 1 // <e> TWI0_ENABLED - Enable TWI0 instance //========================================================== #ifndef TWI0_ENABLED #define TWI0_ENABLED 1
apply_old_config.h overwrites the NRFX_TWI_... defines, but it will still use the new nrfx drivers.
Hope this helps.
- Andreas
As you said
in apply_old_config.h
// TWI #define TWI_ONLY ( defined(TWI_PRESENT) && !defined(TWIM_PRESENT)) #define TWIM_ONLY (!defined(TWI_PRESENT) && defined(TWIM_PRESENT)) #define TWI_AND_TWIM ( defined(TWI_PRESENT) && defined(TWIM_PRESENT)) #if defined(TWI_ENABLED) #undef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED (TWI_ENABLED && (NRFX_TWI0_ENABLED || NRFX_TWI1_ENABLED)) #undef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED (TWI_ENABLED && (NRFX_TWIM0_ENABLED || NRFX_TWIM1_ENABLED)) #if defined(TWI_PRESENT) && !defined(TWIM_PRESENT) #undef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED TWI0_ENABLED #undef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 #undef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED TWI1_ENABLED #undef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 #elif !defined(TWI_PRESENT) && defined(TWIM_PRESENT) #undef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 0 #undef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED TWI0_ENABLED #undef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 #undef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED TWI1_ENABLED
Hi.
I don't understand your reply, did you add this to apply_old_config.h?
You should have added the configurations I wrote in my previous reply to sdk_config.h.
- Andreas
Hi,
no, i just open and saw the value
I don't understand your reply, did you add this to apply_old_config.h?
as like you said sdk_config.h i did the same
// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver //========================================================== #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 1 #endif // <q> NRFX_TWIM0_ENABLED - Enable TWIM0 instance #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 #endif // <q> NRFX_TWIM1_ENABLED - Enable TWIM1 instance #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 #endif // <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY #define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWIM_CONFIG_LOG_LEVEL #define NRFX_TWIM_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIM_CONFIG_INFO_COLOR #define NRFX_TWIM_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR #define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 #endif // </e> // <q> NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for TWIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> the start event of zero-frequency transmission, clear the // <i> peripheral, set desired frequency, start the peripheral, and // <i> the proper transmission. See more in the Errata document or // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/ #ifndef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver //========================================================== #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 #endif // <q> NRFX_TWIS0_ENABLED - Enable TWIS0 instance #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 #endif // <q> NRFX_TWIS1_ENABLED - Enable TWIS1 instance #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 #endif // <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif // <q> NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL #define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL #define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWIS_CONFIG_LOG_LEVEL #define NRFX_TWIS_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIS_CONFIG_INFO_COLOR #define NRFX_TWIS_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR #define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 1 #endif // <q> NRFX_TWI0_ENABLED - Enable TWI0 instance #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 1 #endif // <q> NRFX_TWI1_ENABLED - Enable TWI1 instance #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 #endif // <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY #define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWI_CONFIG_LOG_LEVEL #define NRFX_TWI_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWI_CONFIG_INFO_COLOR #define NRFX_TWI_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWI_CONFIG_DEBUG_COLOR #define NRFX_TWI_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver //========================================================== #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 1 #endif // <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control // <0=> Disabled // <1=> Enabled #ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC #define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity // <0=> Excluded // <14=> Included #ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY #define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate // <323584=> 1200 baud // <643072=> 2400 baud // <1290240=> 4800 baud // <2576384=> 9600 baud // <3862528=> 14400 baud // <5152768=> 19200 baud // <7716864=> 28800 baud // <8388608=> 31250 baud // <10289152=> 38400 baud // <15007744=> 56000 baud // <15400960=> 57600 baud // <20615168=> 76800 baud // <30801920=> 115200 baud // <61865984=> 230400 baud // <67108864=> 250000 baud // <121634816=> 460800 baud // <251658240=> 921600 baud // <268435456=> 1000000 baud #ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE #define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_UARTE_CONFIG_LOG_LEVEL #define NRFX_UARTE_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UARTE_CONFIG_INFO_COLOR #define NRFX_UARTE_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR #define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver //========================================================== #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 1 #endif // <o> NRFX_UART0_ENABLED - Enable UART0 instance #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control // <0=> Disabled // <1=> Enabled #ifndef NRFX_UART_DEFAULT_CONFIG_HWFC #define NRFX_UART_DEFAULT_CONFIG_HWFC 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_PARITY - Parity // <0=> Excluded // <14=> Included #ifndef NRFX_UART_DEFAULT_CONFIG_PARITY #define NRFX_UART_DEFAULT_CONFIG_PARITY 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate // <323584=> 1200 baud // <643072=> 2400 baud // <1290240=> 4800 baud // <2576384=> 9600 baud // <3866624=> 14400 baud // <5152768=> 19200 baud // <7729152=> 28800 baud // <8388608=> 31250 baud // <10309632=> 38400 baud // <15007744=> 56000 baud // <15462400=> 57600 baud // <20615168=> 76800 baud // <30924800=> 115200 baud // <61845504=> 230400 baud // <67108864=> 250000 baud // <123695104=> 460800 baud // <247386112=> 921600 baud // <268435456=> 1000000 baud #ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE #define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 #endif // <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_UART_CONFIG_LOG_LEVEL #define NRFX_UART_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UART_CONFIG_INFO_COLOR #define NRFX_UART_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UART_CONFIG_DEBUG_COLOR #define NRFX_UART_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver //========================================================== #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 #endif // <o> NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode // <1=> Run in SLEEP, Pause in HALT // <8=> Pause in SLEEP, Run in HALT // <9=> Run in SLEEP and HALT // <0=> Pause in SLEEP and HALT #ifndef NRFX_WDT_CONFIG_BEHAVIOUR #define NRFX_WDT_CONFIG_BEHAVIOUR 1 #endif // <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> #ifndef NRFX_WDT_CONFIG_RELOAD_VALUE #define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 #endif // <o> NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_WDT_CONFIG_LOG_LEVEL #define NRFX_WDT_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_WDT_CONFIG_INFO_COLOR #define NRFX_WDT_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_WDT_CONFIG_DEBUG_COLOR #define NRFX_WDT_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer //========================================================== #ifndef NRF_CLOCK_ENABLED #define NRF_CLOCK_ENABLED 1 #endif // <o> CLOCK_CONFIG_LF_SRC - LF Clock Source // <0=> RC // <1=> XTAL // <2=> Synth // <131073=> External Low Swing // <196609=> External Full Swing #ifndef CLOCK_CONFIG_LF_SRC #define CLOCK_CONFIG_LF_SRC 1 #endif // <o> CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef CLOCK_CONFIG_IRQ_PRIORITY #define CLOCK_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer //========================================================== #ifndef PDM_ENABLED #define PDM_ENABLED 0 #endif // <o> PDM_CONFIG_MODE - Mode // <0=> Stereo // <1=> Mono #ifndef PDM_CONFIG_MODE #define PDM_CONFIG_MODE 1 #endif // <o> PDM_CONFIG_EDGE - Edge // <0=> Left falling // <1=> Left rising #ifndef PDM_CONFIG_EDGE #define PDM_CONFIG_EDGE 0 #endif // <o> PDM_CONFIG_CLOCK_FREQ - Clock frequency // <134217728=> 1000k // <138412032=> 1032k (default) // <142606336=> 1067k #ifndef PDM_CONFIG_CLOCK_FREQ #define PDM_CONFIG_CLOCK_FREQ 138412032 #endif // <o> PDM_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef PDM_CONFIG_IRQ_PRIORITY #define PDM_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer //========================================================== #ifndef POWER_ENABLED #define POWER_ENABLED 0 #endif // <o> POWER_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef POWER_CONFIG_IRQ_PRIORITY #define POWER_CONFIG_IRQ_PRIORITY 6 #endif // <q> POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator // <i> This settings means only that components for DCDC regulator are installed and it can be enabled. #ifndef POWER_CONFIG_DEFAULT_DCDCEN #define POWER_CONFIG_DEFAULT_DCDCEN 0 #endif // <q> POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator // <i> This settings means only that components for DCDC regulator are installed and it can be enabled. #ifndef POWER_CONFIG_DEFAULT_DCDCENHV #define POWER_CONFIG_DEFAULT_DCDCENHV 0 #endif // </e> // <q> PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer #ifndef PPI_ENABLED #define PPI_ENABLED 0 #endif // <e> PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer //========================================================== #ifndef PWM_ENABLED #define PWM_ENABLED 0 #endif // <o> PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT0_PIN #define PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT1_PIN #define PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT2_PIN #define PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT3_PIN #define PWM_DEFAULT_CONFIG_OUT3_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock // <0=> 16 MHz // <1=> 8 MHz // <2=> 4 MHz // <3=> 2 MHz // <4=> 1 MHz // <5=> 500 kHz // <6=> 250 kHz // <7=> 125 kHz #ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK #define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif // <o> PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode // <0=> Up // <1=> Up and Down #ifndef PWM_DEFAULT_CONFIG_COUNT_MODE #define PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_TOP_VALUE - Top value #ifndef PWM_DEFAULT_CONFIG_TOP_VALUE #define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 #endif // <o> PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode // <0=> Common // <1=> Grouped // <2=> Individual // <3=> Waveform #ifndef PWM_DEFAULT_CONFIG_LOAD_MODE #define PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_STEP_MODE - Step mode // <0=> Auto // <1=> Triggered #ifndef PWM_DEFAULT_CONFIG_STEP_MODE #define PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> PWM0_ENABLED - Enable PWM0 instance #ifndef PWM0_ENABLED #define PWM0_ENABLED 0 #endif // <q> PWM1_ENABLED - Enable PWM1 instance #ifndef PWM1_ENABLED #define PWM1_ENABLED 0 #endif // <q> PWM2_ENABLED - Enable PWM2 instance #ifndef PWM2_ENABLED #define PWM2_ENABLED 0 #endif // <e> PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM. // <i> The workaround uses interrupts to wake up the CPU and ensure // <i> it is active when PWM is about to start a DMA transfer. For // <i> initial transfer, done when a playback is started via PPI, // <i> a specific EGU instance is used to generate the interrupt. // <i> During the playback, the PWM interrupt triggered on SEQEND // <i> event of a preceding sequence is used to protect the transfer // <i> done for the next sequence to be played. //========================================================== #ifndef PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // <o> PWM_NRF52_ANOMALY_109_EGU_INSTANCE - EGU instance used by the nRF52 Anomaly 109 workaround for PWM. // <0=> EGU0 // <1=> EGU1 // <2=> EGU2 // <3=> EGU3 // <4=> EGU4 // <5=> EGU5 #ifndef PWM_NRF52_ANOMALY_109_EGU_INSTANCE #define PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5 #endif // </e> // </e> // <e> QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer //========================================================== #ifndef QDEC_ENABLED #define QDEC_ENABLED 0 #endif // <o> QDEC_CONFIG_REPORTPER - Report period // <0=> 10 Samples // <1=> 40 Samples // <2=> 80 Samples // <3=> 120 Samples // <4=> 160 Samples // <5=> 200 Samples // <6=> 240 Samples // <7=> 280 Samples #ifndef QDEC_CONFIG_REPORTPER #define QDEC_CONFIG_REPORTPER 0 #endif // <o> QDEC_CONFIG_SAMPLEPER - Sample period // <0=> 128 us // <1=> 256 us // <2=> 512 us // <3=> 1024 us // <4=> 2048 us // <5=> 4096 us // <6=> 8192 us // <7=> 16384 us #ifndef QDEC_CONFIG_SAMPLEPER #define QDEC_CONFIG_SAMPLEPER 7 #endif // <o> QDEC_CONFIG_PIO_A - A pin <0-31> #ifndef QDEC_CONFIG_PIO_A #define QDEC_CONFIG_PIO_A 31 #endif // <o> QDEC_CONFIG_PIO_B - B pin <0-31> #ifndef QDEC_CONFIG_PIO_B #define QDEC_CONFIG_PIO_B 31 #endif // <o> QDEC_CONFIG_PIO_LED - LED pin <0-31> #ifndef QDEC_CONFIG_PIO_LED #define QDEC_CONFIG_PIO_LED 31 #endif // <o> QDEC_CONFIG_LEDPRE - LED pre #ifndef QDEC_CONFIG_LEDPRE #define QDEC_CONFIG_LEDPRE 511 #endif // <o> QDEC_CONFIG_LEDPOL - LED polarity // <0=> Active low // <1=> Active high #ifndef QDEC_CONFIG_LEDPOL #define QDEC_CONFIG_LEDPOL 1 #endif // <q> QDEC_CONFIG_DBFEN - Debouncing enable #ifndef QDEC_CONFIG_DBFEN #define QDEC_CONFIG_DBFEN 0 #endif // <q> QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable #ifndef QDEC_CONFIG_SAMPLE_INTEN #define QDEC_CONFIG_SAMPLE_INTEN 0 #endif // <o> QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef QDEC_CONFIG_IRQ_PRIORITY #define QDEC_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer //========================================================== #ifndef QSPI_ENABLED #define QSPI_ENABLED 0 #endif // <o> QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> #ifndef QSPI_CONFIG_SCK_DELAY #define QSPI_CONFIG_SCK_DELAY 1 #endif // <o> QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. #ifndef QSPI_CONFIG_XIP_OFFSET #define QSPI_CONFIG_XIP_OFFSET 0 #endif // <o> QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. // <0=> FastRead // <1=> Read2O // <2=> Read2IO // <3=> Read4O // <4=> Read4IO #ifndef QSPI_CONFIG_READOC #define QSPI_CONFIG_READOC 0 #endif // <o> QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. // <0=> PP // <1=> PP2O // <2=> PP4O // <3=> PP4IO #ifndef QSPI_CONFIG_WRITEOC #define QSPI_CONFIG_WRITEOC 0 #endif // <o> QSPI_CONFIG_ADDRMODE - Addressing mode. // <0=> 24bit // <1=> 32bit #ifndef QSPI_CONFIG_ADDRMODE #define QSPI_CONFIG_ADDRMODE 0 #endif // <o> QSPI_CONFIG_MODE - SPI mode. // <0=> Mode 0 // <1=> Mode 1 #ifndef QSPI_CONFIG_MODE #define QSPI_CONFIG_MODE 0 #endif // <o> QSPI_CONFIG_FREQUENCY - Frequency divider. // <0=> 32MHz/1 // <1=> 32MHz/2 // <2=> 32MHz/3 // <3=> 32MHz/4 // <4=> 32MHz/5 // <5=> 32MHz/6 // <6=> 32MHz/7 // <7=> 32MHz/8 // <8=> 32MHz/9 // <9=> 32MHz/10 // <10=> 32MHz/11 // <11=> 32MHz/12 // <12=> 32MHz/13 // <13=> 32MHz/14 // <14=> 32MHz/15 // <15=> 32MHz/16 #ifndef QSPI_CONFIG_FREQUENCY #define QSPI_CONFIG_FREQUENCY 15 #endif // <s> QSPI_PIN_SCK - SCK pin value. #ifndef QSPI_PIN_SCK #define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_CSN - CSN pin value. #ifndef QSPI_PIN_CSN #define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO0 - IO0 pin value. #ifndef QSPI_PIN_IO0 #define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO1 - IO1 pin value. #ifndef QSPI_PIN_IO1 #define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO2 - IO2 pin value. #ifndef QSPI_PIN_IO2 #define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO3 - IO3 pin value. #ifndef QSPI_PIN_IO3 #define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED #endif // <o> QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef QSPI_CONFIG_IRQ_PRIORITY #define QSPI_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer //========================================================== #ifndef RNG_ENABLED #define RNG_ENABLED 0 #endif // <q> RNG_CONFIG_ERROR_CORRECTION - Error correction #ifndef RNG_CONFIG_ERROR_CORRECTION #define RNG_CONFIG_ERROR_CORRECTION 1 #endif // <o> RNG_CONFIG_POOL_SIZE - Pool size #ifndef RNG_CONFIG_POOL_SIZE #define RNG_CONFIG_POOL_SIZE 64 #endif // <o> RNG_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef RNG_CONFIG_IRQ_PRIORITY #define RNG_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer //========================================================== #ifndef RTC_ENABLED #define RTC_ENABLED 0 #endif // <o> RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> #ifndef RTC_DEFAULT_CONFIG_FREQUENCY #define RTC_DEFAULT_CONFIG_FREQUENCY 32768 #endif // <q> RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering #ifndef RTC_DEFAULT_CONFIG_RELIABLE #define RTC_DEFAULT_CONFIG_RELIABLE 0 #endif // <o> RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> RTC0_ENABLED - Enable RTC0 instance #ifndef RTC0_ENABLED #define RTC0_ENABLED 0 #endif // <q> RTC1_ENABLED - Enable RTC1 instance #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 #endif // <q> RTC2_ENABLED - Enable RTC2 instance #ifndef RTC2_ENABLED #define RTC2_ENABLED 0 #endif // <o> NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt #ifndef NRF_MAXIMUM_LATENCY_US #define NRF_MAXIMUM_LATENCY_US 2000 #endif // </e> // <e> SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED #define SAADC_ENABLED 0 #endif // <o> SAADC_CONFIG_RESOLUTION - Resolution // <0=> 8 bit // <1=> 10 bit // <2=> 12 bit // <3=> 14 bit #ifndef SAADC_CONFIG_RESOLUTION #define SAADC_CONFIG_RESOLUTION 1 #endif // <o> SAADC_CONFIG_OVERSAMPLE - Sample period // <0=> Disabled // <1=> 2x // <2=> 4x // <3=> 8x // <4=> 16x // <5=> 32x // <6=> 64x // <7=> 128x // <8=> 256x #ifndef SAADC_CONFIG_OVERSAMPLE #define SAADC_CONFIG_OVERSAMPLE 0 #endif // <q> SAADC_CONFIG_LP_MODE - Enabling low power mode #ifndef SAADC_CONFIG_LP_MODE #define SAADC_CONFIG_LP_MODE 0 #endif // <o> SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SAADC_CONFIG_IRQ_PRIORITY #define SAADC_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer //========================================================== #ifndef SPIS_ENABLED #define SPIS_ENABLED 0 #endif // <o> SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <o> SPIS_DEFAULT_MODE - Mode // <0=> MODE_0 // <1=> MODE_1 // <2=> MODE_2 // <3=> MODE_3 #ifndef SPIS_DEFAULT_MODE #define SPIS_DEFAULT_MODE 0 #endif // <o> SPIS_DEFAULT_BIT_ORDER - SPIS default bit order // <0=> MSB first // <1=> LSB first #ifndef SPIS_DEFAULT_BIT_ORDER #define SPIS_DEFAULT_BIT_ORDER 0 #endif // <o> SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> #ifndef SPIS_DEFAULT_DEF #define SPIS_DEFAULT_DEF 255 #endif // <o> SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> #ifndef SPIS_DEFAULT_ORC #define SPIS_DEFAULT_ORC 255 #endif // <q> SPIS0_ENABLED - Enable SPIS0 instance #ifndef SPIS0_ENABLED #define SPIS0_ENABLED 0 #endif // <q> SPIS1_ENABLED - Enable SPIS1 instance #ifndef SPIS1_ENABLED #define SPIS1_ENABLED 0 #endif // <q> SPIS2_ENABLED - Enable SPIS2 instance #ifndef SPIS2_ENABLED #define SPIS2_ENABLED 0 #endif // <q> SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for SPIS. // <i> The workaround uses a GPIOTE channel to generate interrupts // <i> on falling edges detected on the CSN line. This will make // <i> the CPU active for the moment when SPIS starts DMA transfers, // <i> and this way the transfers will be protected. // <i> This workaround uses GPIOTE driver, so this driver must be // <i> enabled as well. #ifndef SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer //========================================================== #ifndef SPI_ENABLED #define SPI_ENABLED 0 #endif // <o> SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <o> NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. // <0=> NRF_GPIO_PIN_NOPULL // <1=> NRF_GPIO_PIN_PULLDOWN // <3=> NRF_GPIO_PIN_PULLUP #ifndef NRF_SPI_DRV_MISO_PULLUP_CFG #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif // <e> SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED #define SPI0_ENABLED 0 #endif // <q> SPI0_USE_EASY_DMA - Use EasyDMA #ifndef SPI0_USE_EASY_DMA #define SPI0_USE_EASY_DMA 1 #endif // </e> // <e> SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED #define SPI1_ENABLED 0 #endif // <q> SPI1_USE_EASY_DMA - Use EasyDMA #ifndef SPI1_USE_EASY_DMA #define SPI1_USE_EASY_DMA 1 #endif // </e> // <e> SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED #define SPI2_ENABLED 0 #endif // <q> SPI2_USE_EASY_DMA - Use EasyDMA #ifndef SPI2_USE_EASY_DMA #define SPI2_USE_EASY_DMA 1 #endif // </e> // <q> SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for SPIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> a start event of zero-length transmission to start the clock. This // <i> ensures that the DMA transfer will be executed without issues and // <i> that the proper transfer will be started. See more in the Errata // <i> document or Anomaly 109 Addendum located at // <i> https://infocenter.nordicsemi.com/ #ifndef SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer //========================================================== #ifndef TIMER_ENABLED #define TIMER_ENABLED 0 #endif // <o> TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode // <0=> 16 MHz // <1=> 8 MHz // <2=> 4 MHz // <3=> 2 MHz // <4=> 1 MHz // <5=> 500 kHz // <6=> 250 kHz // <7=> 125 kHz // <8=> 62.5 kHz // <9=> 31.25 kHz #ifndef TIMER_DEFAULT_CONFIG_FREQUENCY #define TIMER_DEFAULT_CONFIG_FREQUENCY 0 #endif // <o> TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation // <0=> Timer // <1=> Counter #ifndef TIMER_DEFAULT_CONFIG_MODE #define TIMER_DEFAULT_CONFIG_MODE 0 #endif // <o> TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width // <0=> 16 bit // <1=> 8 bit // <2=> 24 bit // <3=> 32 bit #ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH #define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 #endif // <o> TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> TIMER0_ENABLED - Enable TIMER0 instance #ifndef TIMER0_ENABLED #define TIMER0_ENABLED 0 #endif // <q> TIMER1_ENABLED - Enable TIMER1 instance #ifndef TIMER1_ENABLED #define TIMER1_ENABLED 0 #endif // <q> TIMER2_ENABLED - Enable TIMER2 instance #ifndef TIMER2_ENABLED #define TIMER2_ENABLED 0 #endif // <q> TIMER3_ENABLED - Enable TIMER3 instance #ifndef TIMER3_ENABLED #define TIMER3_ENABLED 0 #endif // <q> TIMER4_ENABLED - Enable TIMER4 instance #ifndef TIMER4_ENABLED #define TIMER4_ENABLED 0 #endif // </e> // <e> TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer //========================================================== #ifndef TWIS_ENABLED #define TWIS_ENABLED 0 #endif // <q> TWIS0_ENABLED - Enable TWIS0 instance #ifndef TWIS0_ENABLED #define TWIS0_ENABLED 0 #endif // <q> TWIS1_ENABLED - Enable TWIS1 instance #ifndef TWIS1_ENABLED #define TWIS1_ENABLED 0 #endif // <q> TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. #ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif // <q> TWIS_NO_SYNC_MODE - Remove support for synchronous mode // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. #ifndef TWIS_NO_SYNC_MODE #define TWIS_NO_SYNC_MODE 0 #endif // <o> TWIS_DEFAULT_CONFIG_ADDR0 - Address0 #ifndef TWIS_DEFAULT_CONFIG_ADDR0 #define TWIS_DEFAULT_CONFIG_ADDR0 0 #endif // <o> TWIS_DEFAULT_CONFIG_ADDR1 - Address1 #ifndef TWIS_DEFAULT_CONFIG_ADDR1 #define TWIS_DEFAULT_CONFIG_ADDR1 0 #endif // <o> TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SCL_PULL #define TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif // <o> TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SDA_PULL #define TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif // <o> TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer //========================================================== #ifndef TWI_ENABLED #define TWI_ENABLED 1 #endif // <o> TWI_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef TWI_DEFAULT_CONFIG_FREQUENCY #define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init #ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT #define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 #endif // <q> TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> TWI0_ENABLED - Enable TWI0 instance //========================================================== #ifndef TWI0_ENABLED #define TWI0_ENABLED 1 #endif // <q> TWI0_USE_EASY_DMA - Use EasyDMA (if present) #ifndef TWI0_USE_EASY_DMA #define TWI0_USE_EASY_DMA 0 #endif // </e> // <e> TWI1_ENABLED - Enable TWI1 instance //========================================================== #ifndef TWI1_ENABLED #define TWI1_ENABLED 0 #endif // <q> TWI1_USE_EASY_DMA - Use EasyDMA (if present) #ifndef TWI1_USE_EASY_DMA #define TWI1_USE_EASY_DMA 0 #endif // </e> // <q> TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for TWIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> the start event of zero-frequency transmission, clear the // <i> peripheral, set desired frequency, start the peripheral, and // <i> the proper transmission. See more in the Errata document or // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/ #ifndef TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e>
Hi,
no, i just open and saw the value
I don't understand your reply, did you add this to apply_old_config.h?
as like you said sdk_config.h i did the same
// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver //========================================================== #ifndef NRFX_TWIM_ENABLED #define NRFX_TWIM_ENABLED 1 #endif // <q> NRFX_TWIM0_ENABLED - Enable TWIM0 instance #ifndef NRFX_TWIM0_ENABLED #define NRFX_TWIM0_ENABLED 0 #endif // <q> NRFX_TWIM1_ENABLED - Enable TWIM1 instance #ifndef NRFX_TWIM1_ENABLED #define NRFX_TWIM1_ENABLED 0 #endif // <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY #define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED #define NRFX_TWIM_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWIM_CONFIG_LOG_LEVEL #define NRFX_TWIM_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWIM_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIM_CONFIG_INFO_COLOR #define NRFX_TWIM_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWIM_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR #define NRFX_TWIM_CONFIG_DEBUG_COLOR 0 #endif // </e> // <q> NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for TWIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> the start event of zero-frequency transmission, clear the // <i> peripheral, set desired frequency, start the peripheral, and // <i> the proper transmission. See more in the Errata document or // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/ #ifndef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver //========================================================== #ifndef NRFX_TWIS_ENABLED #define NRFX_TWIS_ENABLED 0 #endif // <q> NRFX_TWIS0_ENABLED - Enable TWIS0 instance #ifndef NRFX_TWIS0_ENABLED #define NRFX_TWIS0_ENABLED 0 #endif // <q> NRFX_TWIS1_ENABLED - Enable TWIS1 instance #ifndef NRFX_TWIS1_ENABLED #define NRFX_TWIS1_ENABLED 0 #endif // <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif // <q> NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. #ifndef NRFX_TWIS_NO_SYNC_MODE #define NRFX_TWIS_NO_SYNC_MODE 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1 #define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL #define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL #define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif // <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED #define NRFX_TWIS_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWIS_CONFIG_LOG_LEVEL #define NRFX_TWIS_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWIS_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIS_CONFIG_INFO_COLOR #define NRFX_TWIS_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWIS_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR #define NRFX_TWIS_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver //========================================================== #ifndef NRFX_TWI_ENABLED #define NRFX_TWI_ENABLED 1 #endif // <q> NRFX_TWI0_ENABLED - Enable TWI0 instance #ifndef NRFX_TWI0_ENABLED #define NRFX_TWI0_ENABLED 1 #endif // <q> NRFX_TWI1_ENABLED - Enable TWI1 instance #ifndef NRFX_TWI1_ENABLED #define NRFX_TWI1_ENABLED 0 #endif // <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY #define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_TWI_CONFIG_LOG_ENABLED #define NRFX_TWI_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_TWI_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_TWI_CONFIG_LOG_LEVEL #define NRFX_TWI_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_TWI_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWI_CONFIG_INFO_COLOR #define NRFX_TWI_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_TWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_TWI_CONFIG_DEBUG_COLOR #define NRFX_TWI_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver //========================================================== #ifndef NRFX_UARTE_ENABLED #define NRFX_UARTE_ENABLED 1 #endif // <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance #ifndef NRFX_UARTE0_ENABLED #define NRFX_UARTE0_ENABLED 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control // <0=> Disabled // <1=> Enabled #ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC #define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity // <0=> Excluded // <14=> Included #ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY #define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate // <323584=> 1200 baud // <643072=> 2400 baud // <1290240=> 4800 baud // <2576384=> 9600 baud // <3862528=> 14400 baud // <5152768=> 19200 baud // <7716864=> 28800 baud // <8388608=> 31250 baud // <10289152=> 38400 baud // <15007744=> 56000 baud // <15400960=> 57600 baud // <20615168=> 76800 baud // <30801920=> 115200 baud // <61865984=> 230400 baud // <67108864=> 250000 baud // <121634816=> 460800 baud // <251658240=> 921600 baud // <268435456=> 1000000 baud #ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE #define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920 #endif // <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED #define NRFX_UARTE_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_UARTE_CONFIG_LOG_LEVEL #define NRFX_UARTE_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UARTE_CONFIG_INFO_COLOR #define NRFX_UARTE_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR #define NRFX_UARTE_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver //========================================================== #ifndef NRFX_UART_ENABLED #define NRFX_UART_ENABLED 1 #endif // <o> NRFX_UART0_ENABLED - Enable UART0 instance #ifndef NRFX_UART0_ENABLED #define NRFX_UART0_ENABLED 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control // <0=> Disabled // <1=> Enabled #ifndef NRFX_UART_DEFAULT_CONFIG_HWFC #define NRFX_UART_DEFAULT_CONFIG_HWFC 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_PARITY - Parity // <0=> Excluded // <14=> Included #ifndef NRFX_UART_DEFAULT_CONFIG_PARITY #define NRFX_UART_DEFAULT_CONFIG_PARITY 0 #endif // <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate // <323584=> 1200 baud // <643072=> 2400 baud // <1290240=> 4800 baud // <2576384=> 9600 baud // <3866624=> 14400 baud // <5152768=> 19200 baud // <7729152=> 28800 baud // <8388608=> 31250 baud // <10309632=> 38400 baud // <15007744=> 56000 baud // <15462400=> 57600 baud // <20615168=> 76800 baud // <30924800=> 115200 baud // <61845504=> 230400 baud // <67108864=> 250000 baud // <123695104=> 460800 baud // <247386112=> 921600 baud // <268435456=> 1000000 baud #ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE #define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800 #endif // <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_UART_CONFIG_LOG_ENABLED #define NRFX_UART_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_UART_CONFIG_LOG_LEVEL #define NRFX_UART_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UART_CONFIG_INFO_COLOR #define NRFX_UART_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_UART_CONFIG_DEBUG_COLOR #define NRFX_UART_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver //========================================================== #ifndef NRFX_WDT_ENABLED #define NRFX_WDT_ENABLED 0 #endif // <o> NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode // <1=> Run in SLEEP, Pause in HALT // <8=> Pause in SLEEP, Run in HALT // <9=> Run in SLEEP and HALT // <0=> Pause in SLEEP and HALT #ifndef NRFX_WDT_CONFIG_BEHAVIOUR #define NRFX_WDT_CONFIG_BEHAVIOUR 1 #endif // <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295> #ifndef NRFX_WDT_CONFIG_RELOAD_VALUE #define NRFX_WDT_CONFIG_RELOAD_VALUE 2000 #endif // <o> NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY #define NRFX_WDT_CONFIG_IRQ_PRIORITY 6 #endif // <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module. //========================================================== #ifndef NRFX_WDT_CONFIG_LOG_ENABLED #define NRFX_WDT_CONFIG_LOG_ENABLED 0 #endif // <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level // <0=> Off // <1=> Error // <2=> Warning // <3=> Info // <4=> Debug #ifndef NRFX_WDT_CONFIG_LOG_LEVEL #define NRFX_WDT_CONFIG_LOG_LEVEL 3 #endif // <o> NRFX_WDT_CONFIG_INFO_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_WDT_CONFIG_INFO_COLOR #define NRFX_WDT_CONFIG_INFO_COLOR 0 #endif // <o> NRFX_WDT_CONFIG_DEBUG_COLOR - ANSI escape code prefix. // <0=> Default // <1=> Black // <2=> Red // <3=> Green // <4=> Yellow // <5=> Blue // <6=> Magenta // <7=> Cyan // <8=> White #ifndef NRFX_WDT_CONFIG_DEBUG_COLOR #define NRFX_WDT_CONFIG_DEBUG_COLOR 0 #endif // </e> // </e> // <e> NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer //========================================================== #ifndef NRF_CLOCK_ENABLED #define NRF_CLOCK_ENABLED 1 #endif // <o> CLOCK_CONFIG_LF_SRC - LF Clock Source // <0=> RC // <1=> XTAL // <2=> Synth // <131073=> External Low Swing // <196609=> External Full Swing #ifndef CLOCK_CONFIG_LF_SRC #define CLOCK_CONFIG_LF_SRC 1 #endif // <o> CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef CLOCK_CONFIG_IRQ_PRIORITY #define CLOCK_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer //========================================================== #ifndef PDM_ENABLED #define PDM_ENABLED 0 #endif // <o> PDM_CONFIG_MODE - Mode // <0=> Stereo // <1=> Mono #ifndef PDM_CONFIG_MODE #define PDM_CONFIG_MODE 1 #endif // <o> PDM_CONFIG_EDGE - Edge // <0=> Left falling // <1=> Left rising #ifndef PDM_CONFIG_EDGE #define PDM_CONFIG_EDGE 0 #endif // <o> PDM_CONFIG_CLOCK_FREQ - Clock frequency // <134217728=> 1000k // <138412032=> 1032k (default) // <142606336=> 1067k #ifndef PDM_CONFIG_CLOCK_FREQ #define PDM_CONFIG_CLOCK_FREQ 138412032 #endif // <o> PDM_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef PDM_CONFIG_IRQ_PRIORITY #define PDM_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer //========================================================== #ifndef POWER_ENABLED #define POWER_ENABLED 0 #endif // <o> POWER_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef POWER_CONFIG_IRQ_PRIORITY #define POWER_CONFIG_IRQ_PRIORITY 6 #endif // <q> POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator // <i> This settings means only that components for DCDC regulator are installed and it can be enabled. #ifndef POWER_CONFIG_DEFAULT_DCDCEN #define POWER_CONFIG_DEFAULT_DCDCEN 0 #endif // <q> POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator // <i> This settings means only that components for DCDC regulator are installed and it can be enabled. #ifndef POWER_CONFIG_DEFAULT_DCDCENHV #define POWER_CONFIG_DEFAULT_DCDCENHV 0 #endif // </e> // <q> PPI_ENABLED - nrf_drv_ppi - PPI peripheral driver - legacy layer #ifndef PPI_ENABLED #define PPI_ENABLED 0 #endif // <e> PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer //========================================================== #ifndef PWM_ENABLED #define PWM_ENABLED 0 #endif // <o> PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT0_PIN #define PWM_DEFAULT_CONFIG_OUT0_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT1_PIN #define PWM_DEFAULT_CONFIG_OUT1_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT2_PIN #define PWM_DEFAULT_CONFIG_OUT2_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31> #ifndef PWM_DEFAULT_CONFIG_OUT3_PIN #define PWM_DEFAULT_CONFIG_OUT3_PIN 31 #endif // <o> PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock // <0=> 16 MHz // <1=> 8 MHz // <2=> 4 MHz // <3=> 2 MHz // <4=> 1 MHz // <5=> 500 kHz // <6=> 250 kHz // <7=> 125 kHz #ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK #define PWM_DEFAULT_CONFIG_BASE_CLOCK 4 #endif // <o> PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode // <0=> Up // <1=> Up and Down #ifndef PWM_DEFAULT_CONFIG_COUNT_MODE #define PWM_DEFAULT_CONFIG_COUNT_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_TOP_VALUE - Top value #ifndef PWM_DEFAULT_CONFIG_TOP_VALUE #define PWM_DEFAULT_CONFIG_TOP_VALUE 1000 #endif // <o> PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode // <0=> Common // <1=> Grouped // <2=> Individual // <3=> Waveform #ifndef PWM_DEFAULT_CONFIG_LOAD_MODE #define PWM_DEFAULT_CONFIG_LOAD_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_STEP_MODE - Step mode // <0=> Auto // <1=> Triggered #ifndef PWM_DEFAULT_CONFIG_STEP_MODE #define PWM_DEFAULT_CONFIG_STEP_MODE 0 #endif // <o> PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY #define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> PWM0_ENABLED - Enable PWM0 instance #ifndef PWM0_ENABLED #define PWM0_ENABLED 0 #endif // <q> PWM1_ENABLED - Enable PWM1 instance #ifndef PWM1_ENABLED #define PWM1_ENABLED 0 #endif // <q> PWM2_ENABLED - Enable PWM2 instance #ifndef PWM2_ENABLED #define PWM2_ENABLED 0 #endif // <e> PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM. // <i> The workaround uses interrupts to wake up the CPU and ensure // <i> it is active when PWM is about to start a DMA transfer. For // <i> initial transfer, done when a playback is started via PPI, // <i> a specific EGU instance is used to generate the interrupt. // <i> During the playback, the PWM interrupt triggered on SEQEND // <i> event of a preceding sequence is used to protect the transfer // <i> done for the next sequence to be played. //========================================================== #ifndef PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // <o> PWM_NRF52_ANOMALY_109_EGU_INSTANCE - EGU instance used by the nRF52 Anomaly 109 workaround for PWM. // <0=> EGU0 // <1=> EGU1 // <2=> EGU2 // <3=> EGU3 // <4=> EGU4 // <5=> EGU5 #ifndef PWM_NRF52_ANOMALY_109_EGU_INSTANCE #define PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5 #endif // </e> // </e> // <e> QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer //========================================================== #ifndef QDEC_ENABLED #define QDEC_ENABLED 0 #endif // <o> QDEC_CONFIG_REPORTPER - Report period // <0=> 10 Samples // <1=> 40 Samples // <2=> 80 Samples // <3=> 120 Samples // <4=> 160 Samples // <5=> 200 Samples // <6=> 240 Samples // <7=> 280 Samples #ifndef QDEC_CONFIG_REPORTPER #define QDEC_CONFIG_REPORTPER 0 #endif // <o> QDEC_CONFIG_SAMPLEPER - Sample period // <0=> 128 us // <1=> 256 us // <2=> 512 us // <3=> 1024 us // <4=> 2048 us // <5=> 4096 us // <6=> 8192 us // <7=> 16384 us #ifndef QDEC_CONFIG_SAMPLEPER #define QDEC_CONFIG_SAMPLEPER 7 #endif // <o> QDEC_CONFIG_PIO_A - A pin <0-31> #ifndef QDEC_CONFIG_PIO_A #define QDEC_CONFIG_PIO_A 31 #endif // <o> QDEC_CONFIG_PIO_B - B pin <0-31> #ifndef QDEC_CONFIG_PIO_B #define QDEC_CONFIG_PIO_B 31 #endif // <o> QDEC_CONFIG_PIO_LED - LED pin <0-31> #ifndef QDEC_CONFIG_PIO_LED #define QDEC_CONFIG_PIO_LED 31 #endif // <o> QDEC_CONFIG_LEDPRE - LED pre #ifndef QDEC_CONFIG_LEDPRE #define QDEC_CONFIG_LEDPRE 511 #endif // <o> QDEC_CONFIG_LEDPOL - LED polarity // <0=> Active low // <1=> Active high #ifndef QDEC_CONFIG_LEDPOL #define QDEC_CONFIG_LEDPOL 1 #endif // <q> QDEC_CONFIG_DBFEN - Debouncing enable #ifndef QDEC_CONFIG_DBFEN #define QDEC_CONFIG_DBFEN 0 #endif // <q> QDEC_CONFIG_SAMPLE_INTEN - Sample ready interrupt enable #ifndef QDEC_CONFIG_SAMPLE_INTEN #define QDEC_CONFIG_SAMPLE_INTEN 0 #endif // <o> QDEC_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef QDEC_CONFIG_IRQ_PRIORITY #define QDEC_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer //========================================================== #ifndef QSPI_ENABLED #define QSPI_ENABLED 0 #endif // <o> QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255> #ifndef QSPI_CONFIG_SCK_DELAY #define QSPI_CONFIG_SCK_DELAY 1 #endif // <o> QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. #ifndef QSPI_CONFIG_XIP_OFFSET #define QSPI_CONFIG_XIP_OFFSET 0 #endif // <o> QSPI_CONFIG_READOC - Number of data lines and opcode used for reading. // <0=> FastRead // <1=> Read2O // <2=> Read2IO // <3=> Read4O // <4=> Read4IO #ifndef QSPI_CONFIG_READOC #define QSPI_CONFIG_READOC 0 #endif // <o> QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing. // <0=> PP // <1=> PP2O // <2=> PP4O // <3=> PP4IO #ifndef QSPI_CONFIG_WRITEOC #define QSPI_CONFIG_WRITEOC 0 #endif // <o> QSPI_CONFIG_ADDRMODE - Addressing mode. // <0=> 24bit // <1=> 32bit #ifndef QSPI_CONFIG_ADDRMODE #define QSPI_CONFIG_ADDRMODE 0 #endif // <o> QSPI_CONFIG_MODE - SPI mode. // <0=> Mode 0 // <1=> Mode 1 #ifndef QSPI_CONFIG_MODE #define QSPI_CONFIG_MODE 0 #endif // <o> QSPI_CONFIG_FREQUENCY - Frequency divider. // <0=> 32MHz/1 // <1=> 32MHz/2 // <2=> 32MHz/3 // <3=> 32MHz/4 // <4=> 32MHz/5 // <5=> 32MHz/6 // <6=> 32MHz/7 // <7=> 32MHz/8 // <8=> 32MHz/9 // <9=> 32MHz/10 // <10=> 32MHz/11 // <11=> 32MHz/12 // <12=> 32MHz/13 // <13=> 32MHz/14 // <14=> 32MHz/15 // <15=> 32MHz/16 #ifndef QSPI_CONFIG_FREQUENCY #define QSPI_CONFIG_FREQUENCY 15 #endif // <s> QSPI_PIN_SCK - SCK pin value. #ifndef QSPI_PIN_SCK #define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_CSN - CSN pin value. #ifndef QSPI_PIN_CSN #define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO0 - IO0 pin value. #ifndef QSPI_PIN_IO0 #define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO1 - IO1 pin value. #ifndef QSPI_PIN_IO1 #define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO2 - IO2 pin value. #ifndef QSPI_PIN_IO2 #define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED #endif // <s> QSPI_PIN_IO3 - IO3 pin value. #ifndef QSPI_PIN_IO3 #define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED #endif // <o> QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef QSPI_CONFIG_IRQ_PRIORITY #define QSPI_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer //========================================================== #ifndef RNG_ENABLED #define RNG_ENABLED 0 #endif // <q> RNG_CONFIG_ERROR_CORRECTION - Error correction #ifndef RNG_CONFIG_ERROR_CORRECTION #define RNG_CONFIG_ERROR_CORRECTION 1 #endif // <o> RNG_CONFIG_POOL_SIZE - Pool size #ifndef RNG_CONFIG_POOL_SIZE #define RNG_CONFIG_POOL_SIZE 64 #endif // <o> RNG_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef RNG_CONFIG_IRQ_PRIORITY #define RNG_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer //========================================================== #ifndef RTC_ENABLED #define RTC_ENABLED 0 #endif // <o> RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768> #ifndef RTC_DEFAULT_CONFIG_FREQUENCY #define RTC_DEFAULT_CONFIG_FREQUENCY 32768 #endif // <q> RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering #ifndef RTC_DEFAULT_CONFIG_RELIABLE #define RTC_DEFAULT_CONFIG_RELIABLE 0 #endif // <o> RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY #define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> RTC0_ENABLED - Enable RTC0 instance #ifndef RTC0_ENABLED #define RTC0_ENABLED 0 #endif // <q> RTC1_ENABLED - Enable RTC1 instance #ifndef RTC1_ENABLED #define RTC1_ENABLED 0 #endif // <q> RTC2_ENABLED - Enable RTC2 instance #ifndef RTC2_ENABLED #define RTC2_ENABLED 0 #endif // <o> NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt #ifndef NRF_MAXIMUM_LATENCY_US #define NRF_MAXIMUM_LATENCY_US 2000 #endif // </e> // <e> SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer //========================================================== #ifndef SAADC_ENABLED #define SAADC_ENABLED 0 #endif // <o> SAADC_CONFIG_RESOLUTION - Resolution // <0=> 8 bit // <1=> 10 bit // <2=> 12 bit // <3=> 14 bit #ifndef SAADC_CONFIG_RESOLUTION #define SAADC_CONFIG_RESOLUTION 1 #endif // <o> SAADC_CONFIG_OVERSAMPLE - Sample period // <0=> Disabled // <1=> 2x // <2=> 4x // <3=> 8x // <4=> 16x // <5=> 32x // <6=> 64x // <7=> 128x // <8=> 256x #ifndef SAADC_CONFIG_OVERSAMPLE #define SAADC_CONFIG_OVERSAMPLE 0 #endif // <q> SAADC_CONFIG_LP_MODE - Enabling low power mode #ifndef SAADC_CONFIG_LP_MODE #define SAADC_CONFIG_LP_MODE 0 #endif // <o> SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SAADC_CONFIG_IRQ_PRIORITY #define SAADC_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer //========================================================== #ifndef SPIS_ENABLED #define SPIS_ENABLED 0 #endif // <o> SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY #define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <o> SPIS_DEFAULT_MODE - Mode // <0=> MODE_0 // <1=> MODE_1 // <2=> MODE_2 // <3=> MODE_3 #ifndef SPIS_DEFAULT_MODE #define SPIS_DEFAULT_MODE 0 #endif // <o> SPIS_DEFAULT_BIT_ORDER - SPIS default bit order // <0=> MSB first // <1=> LSB first #ifndef SPIS_DEFAULT_BIT_ORDER #define SPIS_DEFAULT_BIT_ORDER 0 #endif // <o> SPIS_DEFAULT_DEF - SPIS default DEF character <0-255> #ifndef SPIS_DEFAULT_DEF #define SPIS_DEFAULT_DEF 255 #endif // <o> SPIS_DEFAULT_ORC - SPIS default ORC character <0-255> #ifndef SPIS_DEFAULT_ORC #define SPIS_DEFAULT_ORC 255 #endif // <q> SPIS0_ENABLED - Enable SPIS0 instance #ifndef SPIS0_ENABLED #define SPIS0_ENABLED 0 #endif // <q> SPIS1_ENABLED - Enable SPIS1 instance #ifndef SPIS1_ENABLED #define SPIS1_ENABLED 0 #endif // <q> SPIS2_ENABLED - Enable SPIS2 instance #ifndef SPIS2_ENABLED #define SPIS2_ENABLED 0 #endif // <q> SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for SPIS. // <i> The workaround uses a GPIOTE channel to generate interrupts // <i> on falling edges detected on the CSN line. This will make // <i> the CPU active for the moment when SPIS starts DMA transfers, // <i> and this way the transfers will be protected. // <i> This workaround uses GPIOTE driver, so this driver must be // <i> enabled as well. #ifndef SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer //========================================================== #ifndef SPI_ENABLED #define SPI_ENABLED 0 #endif // <o> SPI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY #define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <o> NRF_SPI_DRV_MISO_PULLUP_CFG - MISO PIN pull-up configuration. // <0=> NRF_GPIO_PIN_NOPULL // <1=> NRF_GPIO_PIN_PULLDOWN // <3=> NRF_GPIO_PIN_PULLUP #ifndef NRF_SPI_DRV_MISO_PULLUP_CFG #define NRF_SPI_DRV_MISO_PULLUP_CFG 1 #endif // <e> SPI0_ENABLED - Enable SPI0 instance //========================================================== #ifndef SPI0_ENABLED #define SPI0_ENABLED 0 #endif // <q> SPI0_USE_EASY_DMA - Use EasyDMA #ifndef SPI0_USE_EASY_DMA #define SPI0_USE_EASY_DMA 1 #endif // </e> // <e> SPI1_ENABLED - Enable SPI1 instance //========================================================== #ifndef SPI1_ENABLED #define SPI1_ENABLED 0 #endif // <q> SPI1_USE_EASY_DMA - Use EasyDMA #ifndef SPI1_USE_EASY_DMA #define SPI1_USE_EASY_DMA 1 #endif // </e> // <e> SPI2_ENABLED - Enable SPI2 instance //========================================================== #ifndef SPI2_ENABLED #define SPI2_ENABLED 0 #endif // <q> SPI2_USE_EASY_DMA - Use EasyDMA #ifndef SPI2_USE_EASY_DMA #define SPI2_USE_EASY_DMA 1 #endif // </e> // <q> SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for SPIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> a start event of zero-length transmission to start the clock. This // <i> ensures that the DMA transfer will be executed without issues and // <i> that the proper transfer will be started. See more in the Errata // <i> document or Anomaly 109 Addendum located at // <i> https://infocenter.nordicsemi.com/ #ifndef SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e> // <e> TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer //========================================================== #ifndef TIMER_ENABLED #define TIMER_ENABLED 0 #endif // <o> TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode // <0=> 16 MHz // <1=> 8 MHz // <2=> 4 MHz // <3=> 2 MHz // <4=> 1 MHz // <5=> 500 kHz // <6=> 250 kHz // <7=> 125 kHz // <8=> 62.5 kHz // <9=> 31.25 kHz #ifndef TIMER_DEFAULT_CONFIG_FREQUENCY #define TIMER_DEFAULT_CONFIG_FREQUENCY 0 #endif // <o> TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation // <0=> Timer // <1=> Counter #ifndef TIMER_DEFAULT_CONFIG_MODE #define TIMER_DEFAULT_CONFIG_MODE 0 #endif // <o> TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width // <0=> 16 bit // <1=> 8 bit // <2=> 24 bit // <3=> 32 bit #ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH #define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0 #endif // <o> TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY #define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <q> TIMER0_ENABLED - Enable TIMER0 instance #ifndef TIMER0_ENABLED #define TIMER0_ENABLED 0 #endif // <q> TIMER1_ENABLED - Enable TIMER1 instance #ifndef TIMER1_ENABLED #define TIMER1_ENABLED 0 #endif // <q> TIMER2_ENABLED - Enable TIMER2 instance #ifndef TIMER2_ENABLED #define TIMER2_ENABLED 0 #endif // <q> TIMER3_ENABLED - Enable TIMER3 instance #ifndef TIMER3_ENABLED #define TIMER3_ENABLED 0 #endif // <q> TIMER4_ENABLED - Enable TIMER4 instance #ifndef TIMER4_ENABLED #define TIMER4_ENABLED 0 #endif // </e> // <e> TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer //========================================================== #ifndef TWIS_ENABLED #define TWIS_ENABLED 0 #endif // <q> TWIS0_ENABLED - Enable TWIS0 instance #ifndef TWIS0_ENABLED #define TWIS0_ENABLED 0 #endif // <q> TWIS1_ENABLED - Enable TWIS1 instance #ifndef TWIS1_ENABLED #define TWIS1_ENABLED 0 #endif // <q> TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code. #ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY #define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0 #endif // <q> TWIS_NO_SYNC_MODE - Remove support for synchronous mode // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources. #ifndef TWIS_NO_SYNC_MODE #define TWIS_NO_SYNC_MODE 0 #endif // <o> TWIS_DEFAULT_CONFIG_ADDR0 - Address0 #ifndef TWIS_DEFAULT_CONFIG_ADDR0 #define TWIS_DEFAULT_CONFIG_ADDR0 0 #endif // <o> TWIS_DEFAULT_CONFIG_ADDR1 - Address1 #ifndef TWIS_DEFAULT_CONFIG_ADDR1 #define TWIS_DEFAULT_CONFIG_ADDR1 0 #endif // <o> TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SCL_PULL #define TWIS_DEFAULT_CONFIG_SCL_PULL 0 #endif // <o> TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration // <0=> Disabled // <1=> Pull down // <3=> Pull up #ifndef TWIS_DEFAULT_CONFIG_SDA_PULL #define TWIS_DEFAULT_CONFIG_SDA_PULL 0 #endif // <o> TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY #define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // </e> // <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer //========================================================== #ifndef TWI_ENABLED #define TWI_ENABLED 1 #endif // <o> TWI_DEFAULT_CONFIG_FREQUENCY - Frequency // <26738688=> 100k // <67108864=> 250k // <104857600=> 400k #ifndef TWI_DEFAULT_CONFIG_FREQUENCY #define TWI_DEFAULT_CONFIG_FREQUENCY 26738688 #endif // <q> TWI_DEFAULT_CONFIG_CLR_BUS_INIT - Enables bus clearing procedure during init #ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT #define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0 #endif // <q> TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit #ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT #define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0 #endif // <o> TWI_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice // <0=> 0 (highest) // <1=> 1 // <2=> 2 // <3=> 3 // <4=> 4 // <5=> 5 // <6=> 6 // <7=> 7 #ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY #define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6 #endif // <e> TWI0_ENABLED - Enable TWI0 instance //========================================================== #ifndef TWI0_ENABLED #define TWI0_ENABLED 1 #endif // <q> TWI0_USE_EASY_DMA - Use EasyDMA (if present) #ifndef TWI0_USE_EASY_DMA #define TWI0_USE_EASY_DMA 0 #endif // </e> // <e> TWI1_ENABLED - Enable TWI1 instance //========================================================== #ifndef TWI1_ENABLED #define TWI1_ENABLED 0 #endif // <q> TWI1_USE_EASY_DMA - Use EasyDMA (if present) #ifndef TWI1_USE_EASY_DMA #define TWI1_USE_EASY_DMA 0 #endif // </e> // <q> TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 anomaly 109 workaround for TWIM. // <i> The workaround uses interrupts to wake up the CPU by catching // <i> the start event of zero-frequency transmission, clear the // <i> peripheral, set desired frequency, start the peripheral, and // <i> the proper transmission. See more in the Errata document or // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/ #ifndef TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED #define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0 #endif // </e>