I cannot locate any QPI sample code in the example. Was it possible for anyone to share me the sample code?
Thanks a bunch.
Do you mean QSPI? If so: QSPI Example.
Thanks for the quick feedback. But when I checked the solutions, I think QPI and Quad SPI is different solutions.
Quad SPIWhile dual SPI re-uses the existing serial I/O lines, quad SPI adds two more I/O lines (SIO2 and SIO3) and sends 4 data bits per clock cycle. Again, it is requested by special commands, which enable quad mode after the command itself is sent in single mode.
SQI Type 1: Commands sent on single line but addresses and data sent on four lines
SQI Type 2: Commands and addresses sent on a single line but data sent/received on four lines
QPI/SQIFurther extending quad SPI, some devices support a "quad everything" mode where all communication takes place over 4 data lines, including commands. This is variously called "QPI" (not to be confused with Intel QuickPath Interconnect) or "serial quad I/O" (SQI)
This requires programming a configuration bit in the device and requires care after reset to establish communication.
Ahh, maybe. I've got to check with the developers. -Update:It depends on the memory chip. If it just ignores invalid commands and addresses then maybe. Do you have a datasheet for the memory chip?
Thanks a bunch haakonsh, kindly refer to the attached link. Besides that, may I know how to support this chip using the quadspi sample? The reason I turn to QPI is because the quadspi sample just don't works with this chip.
Well, we should be able to interface with this memory chip via standard QSPI. Do you have a logic analyzer scope of the communication when using the SDK example?