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Bootloader debugging

Wojtek

I want my application to cooperate with DFU. I am using example DFU project from SDK (6.1) (from nrf6310 folder, i simplified it so it could work on PCA10000), but i need some bigger changes.

My problem is that i cannot start debug session in keil. Is bootloader debugging the same as normal application debugging? I can start application, but i cannot set traps and check where the program is at the moment. Should i do some extra settings in keil?

What i do is: erase chip -> flash s110 SD (v7) -> load bootloader by keil -> start debugging -> no profit :(

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    Hi,

    The bootloader firmware is by default configured with optimization at level 3 and therefore not very friendly for debugging.

    What you need to do with the bootloader project is to change the otimization level to 0 - turn off all optimization. However, when doing that the size of the bootloader will be about 22kB , bigger than the default 15kB IROM1 size. The bootloader already located at the top of the flash area so we can't simply increase the size of IROM1 but have to move the start address of the bootloader down to make space for it.

    So what you need to do in bootloader project -> Target Options is the following:

    - C/C++ Tab: Select optimization "Level 0"

    - Target Tab: IROM1 Start: 0x3A000; IROM Size: 0x5C00; (to make room for bigger bootloader)

    - Uncheck the "Use Cross-Module Optimization" checkbox

    - Debug Tab: Use J-LINK / J-TRACE Cortex debugger and press the settings button to select the serial number for your evaluation kit/development kit. Also check "Load application at startup" and "Run to main" checkboxes.

    We also write to UICR.BOOTLOADERADDR the start address of bootloader, so we need to update it as well:

    - In dfu_types.h file update: #define BOOTLOADER_REGION_START 0x0003A000

    Note that if you already write to UICR the default start address of the bootloader (0x0003C000) , this address won't be updated unless you erase the whole chip. So you should do an erase all before you program the softdevice and the new bootloader.

    Now you should be able to debug the bootloader as a normal application.

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  • 0

    Hi,

    The bootloader firmware is by default configured with optimization at level 3 and therefore not very friendly for debugging.

    What you need to do with the bootloader project is to change the otimization level to 0 - turn off all optimization. However, when doing that the size of the bootloader will be about 22kB , bigger than the default 15kB IROM1 size. The bootloader already located at the top of the flash area so we can't simply increase the size of IROM1 but have to move the start address of the bootloader down to make space for it.

    So what you need to do in bootloader project -> Target Options is the following:

    - C/C++ Tab: Select optimization "Level 0"

    - Target Tab: IROM1 Start: 0x3A000; IROM Size: 0x5C00; (to make room for bigger bootloader)

    - Uncheck the "Use Cross-Module Optimization" checkbox

    - Debug Tab: Use J-LINK / J-TRACE Cortex debugger and press the settings button to select the serial number for your evaluation kit/development kit. Also check "Load application at startup" and "Run to main" checkboxes.

    We also write to UICR.BOOTLOADERADDR the start address of bootloader, so we need to update it as well:

    - In dfu_types.h file update: #define BOOTLOADER_REGION_START 0x0003A000

    Note that if you already write to UICR the default start address of the bootloader (0x0003C000) , this address won't be updated unless you erase the whole chip. So you should do an erase all before you program the softdevice and the new bootloader.

    Now you should be able to debug the bootloader as a normal application.

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