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GPIO direction bit is not working

I have problem with both custom boards and DEV board.

From a certain time after GPIO direction bit seems not effecting the pins.

To get rid of software factor, I all erase the flash and attach debugger, change register from it.

PIN_CNF[n]->DIR = 1

OUT->PINn = 1

The pin is still low (Should be High).

PIN_CNF[n]->PULL = PullUp

Pin goes High.

OUT->PINn = 0;

Pin still High.

PIN_CNF[n]->DIR = 0

Pin still High.

PIN_CNF[n]->PULL = 0

Pin goes Low.

I assume direction switching isn't working.

I don't know what caused this, but I have done specific sequence to it.

1. Download and debugging with J-Link

2. Target->Erase All (SES)

3. Download same firmware again (Same one as 1)

  -> The pins which configured as output by firmware encounter the condition

I don't think erasing/programming with debugger or firmware can instantly damage GPIO pins.

But that's only I did to reproduce it.

I already did it to 3 custom boards and 1 Dev board.

Does any one know what actually happen to this ports and any chance to recover them?

I already tried "nrfjprog --recover", but doesn't help.

What was connected to the pins were:

PIN4: TWI_SCL (Pulled up with 10kohm)

PIN9: TWI_SDA (Pulled up with 10kohm)

PIN10: LED with 10kohm to VDD on custom borad (active low), Nothing connected on dev board.

SDK:v15.2.0

IDE: Segger Embedded Studio Mac

SoftDevice: s132

nRF52832 (MDBT42V-P512KV2 RayTac https://www.raytac.com/product/ins.php?index_id=65)

Debugger: J-Link Lite CoretexM

  • Is it possible that your GPIO pins are being set to handle GPIOTE (events & tasks)?

    From chapter 21 of the nRF52 product specification:

    1. 21.1 Pin events and tasks

      The GPIOTE module has a number of tasks and events that can be configured to operate on individual GPIO pins.

      The tasks (SET[n], CLR[n] and OUT[n]) can be used for writing to individual pins, and the events (IN[n]) can be generated from changes occurring at the inputs of individual pins.

      The SET task will set the pin selected in CONFIG[n].PSEL to high. The CLR task will set the pin low.

      The effect of the OUT task on the pin is configurable in CONFIG[n].POLARITY , and can either set the pin high, set it low, or toggle it.

      The tasks and events are configured using the CONFIG[n] registers. Every set of SET, CLR and OUT[n] tasks and IN[n] events has one CONFIG[n] register associated with it.

      As long as a SET[n], CLR[n] and OUT[n] task or an IN[n] event is configured to control a pin n, the pin's output value will only be updated by the GPIOTE module. The pin's output value as specified in the GPIO will therefore be ignored as long as the pin is controlled by GPIOTE. Attempting to write a pin as a normal GPIO pin will have no effect. When the GPIOTE is disconnected from a pin, see MODE field in CONFIG[n] register, the associated pin will get the output and configuration values specified in the GPIO module.

  • Hi, natersoz

    Thank you for the response.

    I understand that GPIOTE will be take priority when it's enabled.

    I checked it's function with damaged (I assumed) pin and the other normal pins.

    Normal pins did work as expected. But the damaged pin didn't work.

    Specifically, in task mode damaged pin won't go High with POLARITY=LoToHi with set TASKS_SET[n].

    And in event mode, damaged pin detect won't work (EVENTS_IN[n] remains 0x00000000).

    Above are all checked after flash all erased and rebooted.

    Registers are operated from debugger (SES & J-Link Lite).

  • Problem solved.

     in short, I added CONFIG_NFCT_PINS_AS_GPIOS to preprocessor definition.

    I haven't set it before.  I assume my dev board and BLE module was configured as GPIO as default.

    So I didn't realize that that kind of settings does exist. I just thought the pins were damaged.

    It was mentioned in the document here.

    https://www.nordicsemi.com/DocLib/Content/User_Guides/nrf52832_dk/latest/UG/nrf52_DK/hw_nfc

    Important: The NFC pins are enabled by default. NFC can be disabled and GPIOs enabled by defining the CONFIG_NFCT_PINS_AS_GPIOS variable in the project settings. This can be done by defining the preprocessor symbol in Keil, go to: Project > Options for Target > C/C++ > Preprocessor Symbols > Define. Here you can add the CONFIG_NFCT_PINS_AS_GPIOS variable after NRF52.

    This functionality can be removed by doing a nRFjprog --recover.

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