nRF52840 -> VDD vs. VDDH and GPIO reference voltage configuration

[Dhara]

Hi,

As mentioned in the Ch. 5 "nRF52840_DK_PB_v1.0.pdf" Section 5.3 in "high power mode the external supply should be connected to just the "VDDH" pins and "VDD" pins not connected to any supply." 

A) But, I referred the Nordic's Forum link - https://devzone.nordicsemi.com/f/nordic-q-a/30851/nrf52840-high-voltage-mode---external-circuitry-supply that says that in high power mode the recommended caps. to be connected to VDD pins..

Any specific reason for connecting the caps on VDD pins in high power mode, other than just noise reduction/ avoid ground coupling ?

B) In high power mode, if GPIO reference follows the VDD (as in the forum link - https://devzone.nordicsemi.com/f/nordic-q-a/30851/nrf52840-high-voltage-mode---external-circuitry-supply) then with respect to the configuration value on "REGOUT0" register the voltage level should follow VDDH and not VDD as mentioned in the Ch. 4 -> Section 4.5.1.8 "nRF52840_DK_PB_v1.0.pdf" product spec. document.

C) In high power mode, why to connect the external supply to VDD  (as in the above forum link)..?? In contrast, as mentioned in the product spec. it says not to connect any supply on "VDD" pin when "high power mode"is required ?

D) how and through which pins the voltage can be supplied to external circuits by configuring the internal LDO or DC/DC regulator when nRF is in "High power mode"?

Please provide clarity/ guidance on this as there is difference in the conditions mentioned in the above forum link and the product spec. document for VDD, VDDH and GPIO reference voltage levels. 

Thanks.

[ketiljo]

A) Se the reference schematic. The cap on VDD is needed for stability of the internal regulators that draws power _from_ VDD.

B) No, the setting in REGOUT0 refers to the output voltage of REG0. This is internally connected to VDD. Hence, the GPIO voltage is equal to VDD, always. See figure 3 and 4 here

C) It doesn't say anything about connecting a high voltage supply to VDD. This _must_ be connected to VDDH, else the device will break. 

C) and D) See the schematic i A)

The info in the link is correct, please read it again.

[Dhara]

Hi ketiljo

Thanks for your detailed reply.. Need to know one more thing. 

In high power mode, is there any provision to disable the supply drawn from VDD pins? --> If YES then can I keep the VDD pins floating?

Finally, I want to reduce the PCB footprint area so need to cut-off the extra caps. on VDD pins and passive components if not mandatory.

Thanks.

[ketiljo]

No, VDD is always connected to the output of REG0 and VDD is always the power supply to the device.

All components shown in the reference schematic are mandatory. If you omit some of them, you will either operate the device out of spec or it might not work at all. The ones marked N.C or "not mounted" can be removed, but all other components _must_ be in place.

[Dhara]

Hi ketiljo

Thanks for your prompt answers.