NRF52840 GPIO P1.xx configuration problem

[lbe]

Hello everyone,

I started porting our software from NRF52830 to NRF840.

I am currently stuck with a weird problem: I a unable to use and configure PINs of the NRF52840 board belonging to port 1 (P1.00, P1.01 and so on).

After struggling a bit to get the correct project options in segger embedded studio, I am now sure that the proper file nrf52840_peripherals.h is used.

I want to use 3 pins configured as outputs for debug reasons (I output a signal on the logic analyzer), and everything works as expected if I use for example pins P0.29, P0.30 and P0.31.

These are configured in my source file using the command NRF_GPIO_PIN_MAP(0,29) and so on.

If I change this configuration to use pins from Port 1 (so, NRF_GPIO_PIN_MAP(1,10), NRF_GPIO_PIN_MAP(1,11) and NRF_GPIO_PIN_MAP(1,12) for example), then I don't see any

output from the logic analyzer, but the software runs correctly anyhow (I can see this both in debug mode and on the LEDs I use as a second debug source). In fact, the output is coming

from pins P0.12, P0.13 and P0.14.......

So, I assume that for some reason, the information of using port P1 is somehow missing.....should I tell the system that I want to use Port 1 as well somewhere?

As for the switches...the trace switch is in position "Def", the top right switch is in "DEFAULT" position, the VEXT is Off and the nRF power source is on VDD is this can help.

For the moment I can live with the GPIOs in Port 0, but one the reasons why we moved to NRF52840 is to have more GPIOs, and it seems I am having problems in configuring them properly.

Any help would be appreciated, thanks to everyone.

[Jørgen Holmefjord]

Hi,

Which SDK version are you using? 

How are you controlling the GPIOs (set, clear, etc)?

Have you tested one of the example projects for nRF52840 in the SDK, to check if the issue is related to your project or how you control the GPIOs?

Best regards,
Jørgen

[lbe]

Hi,

I am working on SDK version 15.0.0, I did not find (and honestly didn't look for, though) any existing example using specific pins I mentioned and the way I control the GPIOs is pretty simple: 

when I want to see the logic analyzer line down, I call  

NRF_GPIO->OUTCLR = (NRF_GPIO->OUT & (1UL << DEBUG1_PIN));

when I want to see the logic analyzer line up, I call

NRF_GPIO->OUTSET = (NRF_GPIO->OUT | (1UL << DEBUG1_PIN));

As said before, this works perfectly when for example

#define DEBUG1_PIN NRF_GPIO_PIN_MAP(0,29)

but stops working if I define the pin as

#define DEBUG1_PIN NRF_GPIO_PIN_MAP(1,12)

Of course, I change the proper logic analyzer connection to the correct board pin.

It seems to me that somehow the port 1 pins are not "activated"....

If you can point me to an existing sample using port 1 pins I would be glad to test it.