The NVIC registers are not described in the Reference Manual, since they are generic and similar for all Cortex M0. You can therefore refer to ARM's documentation on them.
What exactly are you looking for? Normally, you'd access these registers only through the CMSIS interface, the NVIC_* functions.
The NVIC registers are not described in the Reference Manual, since they are generic and similar for all Cortex M0. You can therefore refer to ARM's documentation on them.
What exactly are you looking for? Normally, you'd access these registers only through the CMSIS interface, the NVIC_* functions.
