How can I relocate or manage the transition between the bootloaders interrupt vector map and the applications interrupt vector map which will be at different addresses in FLASH. On the M3/M4, you can remap this but presumably on the M0, you cant. Is there a method I could use on the NRF51822?
Edit: We are not using soft devices (we are using proprietary software and protocols).
Ive written the bootloader software running on the NRF51822 which accepts and programs an image sent from a C++ application, and then using some assembler, loads the main image @ 0x8000. The only issue is how to tackle the problem of a non-relocatable vector table (unless I am mistaken) of the Cortex M0.
NXP and ST's Cortex M0 dont have a VTOR (vector table offset register) but they do have a remap register to set the vector table in SRAM. The vector table could then jump to the correct bootloader vector table (@ 0) or main application vector table (@ 0x8000).
If you could investigate if the NRF51822 offers any features/registers to enable relocation of the vector table I would be grateful, thanks.
