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timer is not woring

hi........

i am using nrf52382 , merged the uart , timer and twi .while debugging i am getting the error unknown function 0x000008C8 

.

 */
int main(void)
{
bool erase_bonds;



    // Initialize.
    uart_init();
    log_init();
    timers_init();
    buttons_leds_init(&erase_bonds);
    power_management_init();
    ble_stack_init();
    gap_params_init();
    gatt_init();
    services_init();
    advertising_init();
    conn_params_init();

  printf("\r\nUART started.\r\n");
    NRF_LOG_INFO("Debug logging for UART over RTT started.");
    advertising_start();


     

twi_init();
  LM75B_set_mode();
    

uint32_t time_ms = 50000; //Time(in miliseconds) between consecutive compare events.
    uint32_t time_ticks;
    uint32_t err_code = NRF_SUCCESS;

   
             

    //Configure all leds on board.
    bsp_board_init(BSP_INIT_LEDS);

    //Configure TIMER_LED for generating simple light effect - leds on board will invert his state one after the other.
    nrf_drv_timer_config_t timer_cfg = NRF_DRV_TIMER_DEFAULT_CONFIG;
   err_code = nrf_drv_timer_init(&TIMER_SENSOR, &timer_cfg, timer_sensor_event_handler);
    APP_ERROR_CHECK(err_code);

      nrf_drv_timer_extended_compare(
         &TIMER_SENSOR, NRF_TIMER_CC_CHANNEL0, time_ticks, NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK, true);


    time_ticks = nrf_drv_timer_ms_to_ticks(&TIMER_SENSOR, time_ms);

     NRF_LOG_INFO("SUCCESS1"); 




 

    // Start execution.
    
    while (true)
    {
        nrf_delay_ms(6000);

       while (m_xfer_done == false);

         m_xfer_done = false;
                
		uint8_t reg[2] = {0x00U};
        err_code = nrf_drv_twi_tx(&m_twi,LM75B_ADDR, reg, sizeof(reg), true);
		APP_ERROR_CHECK(err_code);
		while (m_xfer_done == false);
		nrf_delay_ms(5);
		
	        m_xfer_done = false;
		ret_code_t err_code1 = nrf_drv_twi_rx(&m_twi,LM75B_ADDR, &m_sample, sizeof(m_sample));
		APP_ERROR_CHECK(err_code1);
                NRF_LOG_INFO("%d", m_sample);

}
   
 
               }

      
      
 

Parents
  • Hi,

    It sounds like you have ended up in the error/hardfault handler. Did you follow this debug method, to see if any functions are returning error codes?

    Which instance number are you using for the TIMER? Note that the softdevice use (and block access to) TIMER0. Can you post your sdk_config.h file?

    Best regards,
    Jørgen

  • 
    #ifndef SDK_CONFIG_H
    #define SDK_CONFIG_H
    // <<< Use Configuration Wizard in Context Menu >>>\n
    #ifdef USE_APP_CONFIG
    #include "app_config.h"
    #endif
    // <h> Board Support 
    
    //==========================================================
    // <q> BSP_BTN_BLE_ENABLED  - bsp_btn_ble - Button Control for BLE
     
    
    #ifndef BSP_BTN_BLE_ENABLED
    #define BSP_BTN_BLE_ENABLED 1
    #endif
    
    // </h> 
    //==========================================================
    
    // <h> nRF_BLE 
    
    //==========================================================
    // <q> BLE_ADVERTISING_ENABLED  - ble_advertising - Advertising module
     
    
    #ifndef BLE_ADVERTISING_ENABLED
    #define BLE_ADVERTISING_ENABLED 1
    #endif
    
    // <q> BLE_DTM_ENABLED  - ble_dtm - Module for testing RF/PHY using DTM commands
     
    
    #ifndef BLE_DTM_ENABLED
    #define BLE_DTM_ENABLED 0
    #endif
    
    // <q> BLE_RACP_ENABLED  - ble_racp - Record Access Control Point library
     
    
    #ifndef BLE_RACP_ENABLED
    #define BLE_RACP_ENABLED 0
    #endif
    
    // <e> NRF_BLE_CONN_PARAMS_ENABLED - ble_conn_params - Initiating and executing a connection parameters negotiation procedure
    //==========================================================
    #ifndef NRF_BLE_CONN_PARAMS_ENABLED
    #define NRF_BLE_CONN_PARAMS_ENABLED 1
    #endif
    // <o> NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION - The largest acceptable deviation in slave latency. 
    // <i> The largest deviation (+ or -) from the requested slave latency that will not be renegotiated.
    
    #ifndef NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION
    #define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION 499
    #endif
    
    // <o> NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION - The largest acceptable deviation (in 10 ms units) in supervision timeout. 
    // <i> The largest deviation (+ or -, in 10 ms units) from the requested supervision timeout that will not be renegotiated.
    
    #ifndef NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION
    #define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION 65535
    #endif
    
    // </e>
    
    // <q> NRF_BLE_GATT_ENABLED  - nrf_ble_gatt - GATT module
     
    
    #ifndef NRF_BLE_GATT_ENABLED
    #define NRF_BLE_GATT_ENABLED 1
    #endif
    
    // <e> NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
    //==========================================================
    #ifndef NRF_BLE_QWR_ENABLED
    #define NRF_BLE_QWR_ENABLED 1
    #endif
    // <o> NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. 
    #ifndef NRF_BLE_QWR_MAX_ATTR
    #define NRF_BLE_QWR_MAX_ATTR 0
    #endif
    
    // </e>
    
    // <e> PEER_MANAGER_ENABLED - peer_manager - Peer Manager
    //==========================================================
    #ifndef PEER_MANAGER_ENABLED
    #define PEER_MANAGER_ENABLED 0
    #endif
    // <o> PM_MAX_REGISTRANTS - Number of event handlers that can be registered. 
    #ifndef PM_MAX_REGISTRANTS
    #define PM_MAX_REGISTRANTS 3
    #endif
    
    // <o> PM_FLASH_BUFFERS - Number of internal buffers for flash operations. 
    // <i> Decrease this value to lower RAM usage.
    
    #ifndef PM_FLASH_BUFFERS
    #define PM_FLASH_BUFFERS 4
    #endif
    
    // <q> PM_CENTRAL_ENABLED  - Enable/disable central-specific Peer Manager functionality.
     
    
    // <i> Enable/disable central-specific Peer Manager functionality.
    
    #ifndef PM_CENTRAL_ENABLED
    #define PM_CENTRAL_ENABLED 1
    #endif
    
    // <q> PM_SERVICE_CHANGED_ENABLED  - Enable/disable the service changed management for GATT server in Peer Manager.
     
    
    // <i> If not using a GATT server, or using a server wihout a service changed characteristic,
    // <i> disable this to save code space.
    
    #ifndef PM_SERVICE_CHANGED_ENABLED
    #define PM_SERVICE_CHANGED_ENABLED 1
    #endif
    
    // <q> PM_PEER_RANKS_ENABLED  - Enable/disable the peer rank management in Peer Manager.
     
    
    // <i> Set this to false to save code space if not using the peer rank API.
    
    #ifndef PM_PEER_RANKS_ENABLED
    #define PM_PEER_RANKS_ENABLED 1
    #endif
    
    // <q> PM_LESC_ENABLED  - Enable/disable LESC support in Peer Manager.
     
    
    // <i> If set to true, you need to call nrf_ble_lesc_request_handler() in the main loop to respond to LESC-related BLE events. If LESC support is not required, set this to false to save code space.
    
    #ifndef PM_LESC_ENABLED
    #define PM_LESC_ENABLED 0
    #endif
    
    // <e> PM_RA_PROTECTION_ENABLED - Enable/disable protection against repeated pairing attempts in Peer Manager.
    //==========================================================
    #ifndef PM_RA_PROTECTION_ENABLED
    #define PM_RA_PROTECTION_ENABLED 0
    #endif
    // <o> PM_RA_PROTECTION_TRACKED_PEERS_NUM - Maximum number of peers whose authorization status can be tracked. 
    #ifndef PM_RA_PROTECTION_TRACKED_PEERS_NUM
    #define PM_RA_PROTECTION_TRACKED_PEERS_NUM 8
    #endif
    
    // <o> PM_RA_PROTECTION_MIN_WAIT_INTERVAL - Minimum waiting interval (in ms) before a new pairing attempt can be initiated. 
    #ifndef PM_RA_PROTECTION_MIN_WAIT_INTERVAL
    #define PM_RA_PROTECTION_MIN_WAIT_INTERVAL 4000
    #endif
    
    // <o> PM_RA_PROTECTION_MAX_WAIT_INTERVAL - Maximum waiting interval (in ms) before a new pairing attempt can be initiated. 
    #ifndef PM_RA_PROTECTION_MAX_WAIT_INTERVAL
    #define PM_RA_PROTECTION_MAX_WAIT_INTERVAL 64000
    #endif
    
    // <o> PM_RA_PROTECTION_REWARD_PERIOD - Reward period (in ms). 
    // <i> The waiting interval is gradually decreased when no new failed pairing attempts are made during reward period.
    
    #ifndef PM_RA_PROTECTION_REWARD_PERIOD
    #define PM_RA_PROTECTION_REWARD_PERIOD 10000
    #endif
    
    // </e>
    
    // <o> PM_HANDLER_SEC_DELAY_MS - Delay before starting security. 
    // <i>  This might be necessary for interoperability reasons, especially as peripheral.
    
    #ifndef PM_HANDLER_SEC_DELAY_MS
    #define PM_HANDLER_SEC_DELAY_MS 0
    #endif
    
    // </e>
    
    // </h> 
    //==========================================================
    
    // <h> nRF_BLE_Services 
    
    //==========================================================
    // <q> BLE_ANCS_C_ENABLED  - ble_ancs_c - Apple Notification Service Client
     
    
    #ifndef BLE_ANCS_C_ENABLED
    #define BLE_ANCS_C_ENABLED 0
    #endif
    
    // <q> BLE_ANS_C_ENABLED  - ble_ans_c - Alert Notification Service Client
     
    
    #ifndef BLE_ANS_C_ENABLED
    #define BLE_ANS_C_ENABLED 0
    #endif
    
    // <q> BLE_BAS_C_ENABLED  - ble_bas_c - Battery Service Client
     
    
    #ifndef BLE_BAS_C_ENABLED
    #define BLE_BAS_C_ENABLED 0
    #endif
    
    // <e> BLE_BAS_ENABLED - ble_bas - Battery Service
    //==========================================================
    #ifndef BLE_BAS_ENABLED
    #define BLE_BAS_ENABLED 0
    #endif
    // <e> BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef BLE_BAS_CONFIG_LOG_ENABLED
    #define BLE_BAS_CONFIG_LOG_ENABLED 0
    #endif
    // <o> BLE_BAS_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef BLE_BAS_CONFIG_LOG_LEVEL
    #define BLE_BAS_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> BLE_BAS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_BAS_CONFIG_INFO_COLOR
    #define BLE_BAS_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> BLE_BAS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_BAS_CONFIG_DEBUG_COLOR
    #define BLE_BAS_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <q> BLE_CSCS_ENABLED  - ble_cscs - Cycling Speed and Cadence Service
     
    
    #ifndef BLE_CSCS_ENABLED
    #define BLE_CSCS_ENABLED 0
    #endif
    
    // <q> BLE_CTS_C_ENABLED  - ble_cts_c - Current Time Service Client
     
    
    #ifndef BLE_CTS_C_ENABLED
    #define BLE_CTS_C_ENABLED 0
    #endif
    
    // <q> BLE_DIS_ENABLED  - ble_dis - Device Information Service
     
    
    #ifndef BLE_DIS_ENABLED
    #define BLE_DIS_ENABLED 0
    #endif
    
    // <q> BLE_GLS_ENABLED  - ble_gls - Glucose Service
     
    
    #ifndef BLE_GLS_ENABLED
    #define BLE_GLS_ENABLED 0
    #endif
    
    // <q> BLE_HIDS_ENABLED  - ble_hids - Human Interface Device Service
     
    
    #ifndef BLE_HIDS_ENABLED
    #define BLE_HIDS_ENABLED 0
    #endif
    
    // <q> BLE_HRS_C_ENABLED  - ble_hrs_c - Heart Rate Service Client
     
    
    #ifndef BLE_HRS_C_ENABLED
    #define BLE_HRS_C_ENABLED 0
    #endif
    
    // <q> BLE_HRS_ENABLED  - ble_hrs - Heart Rate Service
     
    
    #ifndef BLE_HRS_ENABLED
    #define BLE_HRS_ENABLED 0
    #endif
    
    // <q> BLE_HTS_ENABLED  - ble_hts - Health Thermometer Service
     
    
    #ifndef BLE_HTS_ENABLED
    #define BLE_HTS_ENABLED 0
    #endif
    

    here sdk_config.h  file next half

     

    // <q> BLE_IAS_C_ENABLED  - ble_ias_c - Immediate Alert Service Client
     
    
    #ifndef BLE_IAS_C_ENABLED
    #define BLE_IAS_C_ENABLED 0
    #endif
    
    // <e> BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
    //==========================================================
    #ifndef BLE_IAS_ENABLED
    #define BLE_IAS_ENABLED 0
    #endif
    // <e> BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef BLE_IAS_CONFIG_LOG_ENABLED
    #define BLE_IAS_CONFIG_LOG_ENABLED 0
    #endif
    // <o> BLE_IAS_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef BLE_IAS_CONFIG_LOG_LEVEL
    #define BLE_IAS_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> BLE_IAS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_IAS_CONFIG_INFO_COLOR
    #define BLE_IAS_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> BLE_IAS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_IAS_CONFIG_DEBUG_COLOR
    #define BLE_IAS_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <q> BLE_LBS_C_ENABLED  - ble_lbs_c - Nordic LED Button Service Client
     
    
    #ifndef BLE_LBS_C_ENABLED
    #define BLE_LBS_C_ENABLED 0
    #endif
    
    // <q> BLE_LBS_ENABLED  - ble_lbs - LED Button Service
     
    
    #ifndef BLE_LBS_ENABLED
    #define BLE_LBS_ENABLED 0
    #endif
    
    // <q> BLE_LLS_ENABLED  - ble_lls - Link Loss Service
     
    
    #ifndef BLE_LLS_ENABLED
    #define BLE_LLS_ENABLED 0
    #endif
    
    // <q> BLE_NUS_C_ENABLED  - ble_nus_c - Nordic UART Central Service
     
    
    #ifndef BLE_NUS_C_ENABLED
    #define BLE_NUS_C_ENABLED 0
    #endif
    
    // <e> BLE_NUS_ENABLED - ble_nus - Nordic UART Service
    //==========================================================
    #ifndef BLE_NUS_ENABLED
    #define BLE_NUS_ENABLED 1
    #endif
    // <e> BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef BLE_NUS_CONFIG_LOG_ENABLED
    #define BLE_NUS_CONFIG_LOG_ENABLED 0
    #endif
    // <o> BLE_NUS_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef BLE_NUS_CONFIG_LOG_LEVEL
    #define BLE_NUS_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> BLE_NUS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_NUS_CONFIG_INFO_COLOR
    #define BLE_NUS_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> BLE_NUS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef BLE_NUS_CONFIG_DEBUG_COLOR
    #define BLE_NUS_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <q> BLE_RSCS_C_ENABLED  - ble_rscs_c - Running Speed and Cadence Client
     
    
    #ifndef BLE_RSCS_C_ENABLED
    #define BLE_RSCS_C_ENABLED 0
    #endif
    
    // <q> BLE_RSCS_ENABLED  - ble_rscs - Running Speed and Cadence Service
     
    
    #ifndef BLE_RSCS_ENABLED
    #define BLE_RSCS_ENABLED 0
    #endif
    
    // <q> BLE_TPS_ENABLED  - ble_tps - TX Power Service
     
    
    #ifndef BLE_TPS_ENABLED
    #define BLE_TPS_ENABLED 0
    #endif
    
    // </h> 
    //==========================================================
    
    // <h> nRF_Core 
    
    //==========================================================
    // <e> NRF_MPU_ENABLED - nrf_mpu - Module for MPU
    //==========================================================
    #ifndef NRF_MPU_ENABLED
    #define NRF_MPU_ENABLED 0
    #endif
    // <q> NRF_MPU_CLI_CMDS  - Enable CLI commands specific to the module.
     
    
    #ifndef NRF_MPU_CLI_CMDS
    #define NRF_MPU_CLI_CMDS 0
    #endif
    
    // </e>
    
    // <e> NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Stack guard
    //==========================================================
    #ifndef NRF_STACK_GUARD_ENABLED
    #define NRF_STACK_GUARD_ENABLED 0
    #endif
    // <o> NRF_STACK_GUARD_CONFIG_SIZE  - Size of the stack guard.
     
    // <5=> 32 bytes 
    // <6=> 64 bytes 
    // <7=> 128 bytes 
    // <8=> 256 bytes 
    // <9=> 512 bytes 
    // <10=> 1024 bytes 
    // <11=> 2048 bytes 
    // <12=> 4096 bytes 
    
    #ifndef NRF_STACK_GUARD_CONFIG_SIZE
    #define NRF_STACK_GUARD_CONFIG_SIZE 7
    #endif
    
    // </e>
    
    // </h> 
    //==========================================================
    
    // <h> nRF_Crypto 
    
    //==========================================================
    // <e> NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library.
    //==========================================================
    #ifndef NRF_CRYPTO_ENABLED
    #define NRF_CRYPTO_ENABLED 1
    #endif
    // <o> NRF_CRYPTO_ALLOCATOR  - Memory allocator
     
    
    // <i> Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected, the user has to create 'nrf_crypto_allocator.h' file that contains NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE, and NRF_CRYPTO_ALLOC_ON_STACK.
    // <0=> Default 
    // <1=> User macros 
    // <2=> On stack (alloca) 
    // <3=> C dynamic memory (malloc) 
    // <4=> SDK Memory Manager (nrf_malloc) 
    
    #ifndef NRF_CRYPTO_ALLOCATOR
    #define NRF_CRYPTO_ALLOCATOR 0
    #endif
    
    // <e> NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend.
    
    // <i> The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840).
    //==========================================================
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0
    #endif
    // <q> NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED  - Enable the secp224r1 elliptic curve support using CC310_BL.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED  - Enable the secp256r1 elliptic curve support using CC310_BL.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED  - CC310_BL SHA-256 hash functionality.
     
    
    // <i> CC310_BL backend implementation for hardware-accelerated SHA-256.
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED  - nrf_cc310_bl buffers to RAM before running hash operation
     
    
    // <i> Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0
    #endif
    
    // <o> NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian 
    // <i> Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU!
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE
    #define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096
    #endif
    
    // </e>
    
    // <e> NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend.
    
    // <i> The CC310 hardware-accelerated cryptography backend (only available on nRF52840).
    //==========================================================
    #ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ENABLED 0
    #endif
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED  - Enable the AES CBC mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED  - Enable the AES CTR mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED  - Enable the AES ECB mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED  - Enable the AES CBC_MAC mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED  - Enable the AES CMAC mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED  - Enable the AES CCM mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED  - Enable the AES CCM* mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED  - Enable the CHACHA-POLY mode using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED  - Enable the secp160r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED  - Enable the secp160r2 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED  - Enable the secp192r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED  - Enable the secp224r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED  - Enable the secp256r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED  - Enable the secp384r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED  - Enable the secp521r1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED  - Enable the secp160k1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED  - Enable the secp192k1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED  - Enable the secp224k1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED  - Enable the secp256k1 elliptic curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED  - Enable the Curve25519 curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED  - Enable the Ed25519 curve support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED  - CC310 SHA-256 hash functionality.
     
    
    // <i> CC310 backend implementation for hardware-accelerated SHA-256.
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED  - CC310 SHA-512 hash functionality
     
    
    // <i> CC310 backend implementation for SHA-512 (in software).
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED  - CC310 HMAC using SHA-256
     
    
    // <i> CC310 backend implementation for HMAC using hardware-accelerated SHA-256.
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED  - CC310 HMAC using SHA-512
     
    
    // <i> CC310 backend implementation for HMAC using SHA-512 (in software).
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED  - Enable RNG support using CC310.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED
    #define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1
    #endif
    
    // </e>
    
    // <e> NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend.
    //==========================================================
    #ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED
    #define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0
    #endif
    // <q> NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED  - Enable the AES EAX mode using Cifra.
     
    
    #ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED
    #define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1
    #endif
    
    // </e>
    
    // <e> NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend.
    //==========================================================
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0
    #endif
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED  - Enable the AES CBC mode mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED  - Enable the AES CTR mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED  - Enable the AES CFB mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED  - Enable the AES ECB mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED  - Enable the AES CBC MAC mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED  - Enable the AES CMAC mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED  - Enable the AES CCM mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED  - Enable the AES GCM mode using mbed TLS.
     
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED  - Enable secp192r1 (NIST 192-bit) curve
     
    
    // <i> Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED  - Enable secp224r1 (NIST 224-bit) curve
     
    
    // <i> Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED  - Enable secp256r1 (NIST 256-bit) curve
     
    
    // <i> Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED  - Enable secp384r1 (NIST 384-bit) curve
     
    
    // <i> Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED  - Enable secp521r1 (NIST 521-bit) curve
     
    
    // <i> Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED  - Enable secp192k1 (Koblitz 192-bit) curve
     
    
    // <i> Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED  - Enable secp224k1 (Koblitz 224-bit) curve
     
    
    // <i> Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED  - Enable secp256k1 (Koblitz 256-bit) curve
     
    
    // <i> Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED  - Enable bp256r1 (Brainpool 256-bit) curve
     
    
    // <i> Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED  - Enable bp384r1 (Brainpool 384-bit) curve
     
    
    // <i> Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED  - Enable bp512r1 (Brainpool 512-bit) curve
     
    
    // <i> Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED  - Enable Curve25519 curve
     
    
    // <i> Enable this setting if you need Curve25519 support using MBEDTLS
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED  - Enable mbed TLS SHA-256 hash functionality.
     
    
    // <i> mbed TLS backend implementation for SHA-256.
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED  - Enable mbed TLS SHA-512 hash functionality.
     
    
    // <i> mbed TLS backend implementation for SHA-512.
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED  - Enable mbed TLS HMAC using SHA-256.
     
    
    // <i> mbed TLS backend implementation for HMAC using SHA-256.
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1
    #endif
    
    // <q> NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED  - Enable mbed TLS HMAC using SHA-512.
     
    
    // <i> mbed TLS backend implementation for HMAC using SHA-512.
    
    #ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED
    #define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1
    #endif
    
    // </e>
    

    
    // <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
    //==========================================================
    #ifndef NRFX_TIMER_ENABLED
    #define NRFX_TIMER_ENABLED 1
    #endif
    // <q> NRFX_TIMER0_ENABLED  - Enable TIMER0 instance
     
    
    #ifndef NRFX_TIMER0_ENABLED
    #define NRFX_TIMER0_ENABLED 1
    #endif
    
    // <q> NRFX_TIMER1_ENABLED  - Enable TIMER1 instance
     
    
    #ifndef NRFX_TIMER1_ENABLED
    #define NRFX_TIMER1_ENABLED 0
    #endif
    
    // <q> NRFX_TIMER2_ENABLED  - Enable TIMER2 instance
     
    
    #ifndef NRFX_TIMER2_ENABLED
    #define NRFX_TIMER2_ENABLED 0
    #endif
    
    // <q> NRFX_TIMER3_ENABLED  - Enable TIMER3 instance
     
    
    #ifndef NRFX_TIMER3_ENABLED
    #define NRFX_TIMER3_ENABLED 0
    #endif
    
    // <q> NRFX_TIMER4_ENABLED  - Enable TIMER4 instance
     
    
    #ifndef NRFX_TIMER4_ENABLED
    #define NRFX_TIMER4_ENABLED 0
    #endif
    
    // <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY  - Timer frequency if in Timer mode
     
    // <0=> 16 MHz 
    // <1=> 8 MHz 
    // <2=> 4 MHz 
    // <3=> 2 MHz 
    // <4=> 1 MHz 
    // <5=> 500 kHz 
    // <6=> 250 kHz 
    // <7=> 125 kHz 
    // <8=> 62.5 kHz 
    // <9=> 31.25 kHz 
    
    #ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
    #define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 1
    #endif
    
    // <o> NRFX_TIMER_DEFAULT_CONFIG_MODE  - Timer mode or operation
     
    // <0=> Timer 
    // <1=> Counter 
    
    #ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE
    #define NRFX_TIMER_DEFAULT_CONFIG_MODE 1
    #endif
    
    // <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH  - Timer counter bit width
     
    // <0=> 16 bit 
    // <1=> 8 bit 
    // <2=> 24 bit 
    // <3=> 32 bit 
    
    #ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
    #define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
    #endif
    
    // <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
    #define NRFX_TIMER_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_TIMER_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_TIMER_CONFIG_LOG_LEVEL
    #define NRFX_TIMER_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_TIMER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TIMER_CONFIG_INFO_COLOR
    #define NRFX_TIMER_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_TIMER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR
    #define NRFX_TIMER_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver
    //==========================================================
    #ifndef NRFX_TWIM_ENABLED
    #define NRFX_TWIM_ENABLED 0
    #endif
    // <q> NRFX_TWIM0_ENABLED  - Enable TWIM0 instance
     
    
    #ifndef NRFX_TWIM0_ENABLED
    #define NRFX_TWIM0_ENABLED 0
    #endif
    
    // <q> NRFX_TWIM1_ENABLED  - Enable TWIM1 instance
     
    
    #ifndef NRFX_TWIM1_ENABLED
    #define NRFX_TWIM1_ENABLED 0
    #endif
    
    // <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY  - Frequency
     
    // <26738688=> 100k 
    // <67108864=> 250k 
    // <104857600=> 400k 
    
    #ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
    #define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688
    #endif
    
    // <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
     
    
    #ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
    #define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
    #endif
    
    // <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_TWIM_CONFIG_LOG_ENABLED
    #define NRFX_TWIM_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_TWIM_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_TWIM_CONFIG_LOG_LEVEL
    #define NRFX_TWIM_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_TWIM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWIM_CONFIG_INFO_COLOR
    #define NRFX_TWIM_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_TWIM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR
    #define NRFX_TWIM_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // <q> NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for TWIM.
     
    
    // <i> The workaround uses interrupts to wake up the CPU by catching
    // <i> the start event of zero-frequency transmission, clear the 
    // <i> peripheral, set desired frequency, start the peripheral, and
    // <i> the proper transmission. See more in the Errata document or
    // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/
    
    #ifndef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
    #define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
    #endif
    
    // </e>
    
    // <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver
    //==========================================================
    #ifndef NRFX_TWIS_ENABLED
    #define NRFX_TWIS_ENABLED 0
    #endif
    // <q> NRFX_TWIS0_ENABLED  - Enable TWIS0 instance
     
    
    #ifndef NRFX_TWIS0_ENABLED
    #define NRFX_TWIS0_ENABLED 0
    #endif
    
    // <q> NRFX_TWIS1_ENABLED  - Enable TWIS1 instance
     
    
    #ifndef NRFX_TWIS1_ENABLED
    #define NRFX_TWIS1_ENABLED 0
    #endif
    
    // <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY  - Assume that any instance would be initialized only once
     
    
    // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
    
    #ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY
    #define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
    #endif
    
    // <q> NRFX_TWIS_NO_SYNC_MODE  - Remove support for synchronous mode
     
    
    // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
    
    #ifndef NRFX_TWIS_NO_SYNC_MODE
    #define NRFX_TWIS_NO_SYNC_MODE 0
    #endif
    
    // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 
    #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
    #define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0
    #endif
    
    // <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 
    #ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
    #define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0
    #endif
    
    // <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL  - SCL pin pull configuration
     
    // <0=> Disabled 
    // <1=> Pull down 
    // <3=> Pull up 
    
    #ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
    #define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0
    #endif
    
    // <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL  - SDA pin pull configuration
     
    // <0=> Disabled 
    // <1=> Pull down 
    // <3=> Pull up 
    
    #ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
    #define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0
    #endif
    
    // <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_TWIS_CONFIG_LOG_ENABLED
    #define NRFX_TWIS_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_TWIS_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_TWIS_CONFIG_LOG_LEVEL
    #define NRFX_TWIS_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_TWIS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWIS_CONFIG_INFO_COLOR
    #define NRFX_TWIS_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_TWIS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR
    #define NRFX_TWIS_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver
    //==========================================================
    #ifndef NRFX_TWI_ENABLED
    #define NRFX_TWI_ENABLED 1
    #endif
    // <q> NRFX_TWI0_ENABLED  - Enable TWI0 instance
     
    
    #ifndef NRFX_TWI0_ENABLED
    #define NRFX_TWI0_ENABLED 1
    #endif
    
    // <q> NRFX_TWI1_ENABLED  - Enable TWI1 instance
     
    
    #ifndef NRFX_TWI1_ENABLED
    #define NRFX_TWI1_ENABLED 0
    #endif
    
    // <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY  - Frequency
     
    // <26738688=> 100k 
    // <67108864=> 250k 
    // <104857600=> 400k 
    
    #ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
    #define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688
    #endif
    
    // <q> NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
     
    
    #ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
    #define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
    #endif
    
    // <o> NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_TWI_CONFIG_LOG_ENABLED
    #define NRFX_TWI_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_TWI_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_TWI_CONFIG_LOG_LEVEL
    #define NRFX_TWI_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_TWI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWI_CONFIG_INFO_COLOR
    #define NRFX_TWI_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_TWI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_TWI_CONFIG_DEBUG_COLOR
    #define NRFX_TWI_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
    //==========================================================
    #ifndef NRFX_UARTE_ENABLED
    #define NRFX_UARTE_ENABLED 1
    #endif
    // <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance 
    #ifndef NRFX_UARTE0_ENABLED
    #define NRFX_UARTE0_ENABLED 0
    #endif
    
    // <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
     
    // <0=> Disabled 
    // <1=> Enabled 
    
    #ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC
    #define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0
    #endif
    
    // <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY  - Parity
     
    // <0=> Excluded 
    // <14=> Included 
    
    #ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY
    #define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0
    #endif
    
    // <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
     
    // <323584=> 1200 baud 
    // <643072=> 2400 baud 
    // <1290240=> 4800 baud 
    // <2576384=> 9600 baud 
    // <3862528=> 14400 baud 
    // <5152768=> 19200 baud 
    // <7716864=> 28800 baud 
    // <8388608=> 31250 baud 
    // <10289152=> 38400 baud 
    // <15007744=> 56000 baud 
    // <15400960=> 57600 baud 
    // <20615168=> 76800 baud 
    // <30801920=> 115200 baud 
    // <61865984=> 230400 baud 
    // <67108864=> 250000 baud 
    // <121634816=> 460800 baud 
    // <251658240=> 921600 baud 
    // <268435456=> 1000000 baud 
    
    #ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
    #define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920
    #endif
    
    // <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_UARTE_CONFIG_LOG_ENABLED
    #define NRFX_UARTE_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_UARTE_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_UARTE_CONFIG_LOG_LEVEL
    #define NRFX_UARTE_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_UARTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_UARTE_CONFIG_INFO_COLOR
    #define NRFX_UARTE_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_UARTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR
    #define NRFX_UARTE_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
    //==========================================================
    #ifndef NRFX_UART_ENABLED
    #define NRFX_UART_ENABLED 1
    #endif
    // <o> NRFX_UART0_ENABLED - Enable UART0 instance 
    #ifndef NRFX_UART0_ENABLED
    #define NRFX_UART0_ENABLED 0
    #endif
    
    // <o> NRFX_UART_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
     
    // <0=> Disabled 
    // <1=> Enabled 
    
    #ifndef NRFX_UART_DEFAULT_CONFIG_HWFC
    #define NRFX_UART_DEFAULT_CONFIG_HWFC 0
    #endif
    
    // <o> NRFX_UART_DEFAULT_CONFIG_PARITY  - Parity
     
    // <0=> Excluded 
    // <14=> Included 
    
    #ifndef NRFX_UART_DEFAULT_CONFIG_PARITY
    #define NRFX_UART_DEFAULT_CONFIG_PARITY 0
    #endif
    
    // <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
     
    // <323584=> 1200 baud 
    // <643072=> 2400 baud 
    // <1290240=> 4800 baud 
    // <2576384=> 9600 baud 
    // <3866624=> 14400 baud 
    // <5152768=> 19200 baud 
    // <7729152=> 28800 baud 
    // <8388608=> 31250 baud 
    // <10309632=> 38400 baud 
    // <15007744=> 56000 baud 
    // <15462400=> 57600 baud 
    // <20615168=> 76800 baud 
    // <30924800=> 115200 baud 
    // <61845504=> 230400 baud 
    // <67108864=> 250000 baud 
    // <123695104=> 460800 baud 
    // <247386112=> 921600 baud 
    // <268435456=> 1000000 baud 
    
    #ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
    #define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800
    #endif
    
    // <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
    #define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_UART_CONFIG_LOG_ENABLED
    #define NRFX_UART_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_UART_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_UART_CONFIG_LOG_LEVEL
    #define NRFX_UART_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_UART_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_UART_CONFIG_INFO_COLOR
    #define NRFX_UART_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_UART_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_UART_CONFIG_DEBUG_COLOR
    #define NRFX_UART_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver
    //==========================================================
    #ifndef NRFX_WDT_ENABLED
    #define NRFX_WDT_ENABLED 0
    #endif
    // <o> NRFX_WDT_CONFIG_BEHAVIOUR  - WDT behavior in CPU SLEEP or HALT mode
     
    // <1=> Run in SLEEP, Pause in HALT 
    // <8=> Pause in SLEEP, Run in HALT 
    // <9=> Run in SLEEP and HALT 
    // <0=> Pause in SLEEP and HALT 
    
    #ifndef NRFX_WDT_CONFIG_BEHAVIOUR
    #define NRFX_WDT_CONFIG_BEHAVIOUR 1
    #endif
    
    // <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value  <15-4294967295> 
    
    
    #ifndef NRFX_WDT_CONFIG_RELOAD_VALUE
    #define NRFX_WDT_CONFIG_RELOAD_VALUE 2000
    #endif
    
    // <o> NRFX_WDT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY
    #define NRFX_WDT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module.
    //==========================================================
    #ifndef NRFX_WDT_CONFIG_LOG_ENABLED
    #define NRFX_WDT_CONFIG_LOG_ENABLED 0
    #endif
    // <o> NRFX_WDT_CONFIG_LOG_LEVEL  - Default Severity level
     
    // <0=> Off 
    // <1=> Error 
    // <2=> Warning 
    // <3=> Info 
    // <4=> Debug 
    
    #ifndef NRFX_WDT_CONFIG_LOG_LEVEL
    #define NRFX_WDT_CONFIG_LOG_LEVEL 3
    #endif
    
    // <o> NRFX_WDT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_WDT_CONFIG_INFO_COLOR
    #define NRFX_WDT_CONFIG_INFO_COLOR 0
    #endif
    
    // <o> NRFX_WDT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
     
    // <0=> Default 
    // <1=> Black 
    // <2=> Red 
    // <3=> Green 
    // <4=> Yellow 
    // <5=> Blue 
    // <6=> Magenta 
    // <7=> Cyan 
    // <8=> White 
    
    #ifndef NRFX_WDT_CONFIG_DEBUG_COLOR
    #define NRFX_WDT_CONFIG_DEBUG_COLOR 0
    #endif
    
    // </e>
    
    // </e>
    
    // <e> NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer
    //==========================================================
    #ifndef NRF_CLOCK_ENABLED
    #define NRF_CLOCK_ENABLED 1
    #endif
    // <o> CLOCK_CONFIG_LF_SRC  - LF Clock Source
     
    // <0=> RC 
    // <1=> XTAL 
    // <2=> Synth 
    // <131073=> External Low Swing 
    // <196609=> External Full Swing 
    
    #ifndef CLOCK_CONFIG_LF_SRC
    #define CLOCK_CONFIG_LF_SRC 1
    #endif
    
    // <o> CLOCK_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef CLOCK_CONFIG_IRQ_PRIORITY
    #define CLOCK_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer
    //==========================================================
    #ifndef PDM_ENABLED
    #define PDM_ENABLED 0
    #endif
    // <o> PDM_CONFIG_MODE  - Mode
     
    // <0=> Stereo 
    // <1=> Mono 
    
    #ifndef PDM_CONFIG_MODE
    #define PDM_CONFIG_MODE 1
    #endif
    
    // <o> PDM_CONFIG_EDGE  - Edge
     
    // <0=> Left falling 
    // <1=> Left rising 
    
    #ifndef PDM_CONFIG_EDGE
    #define PDM_CONFIG_EDGE 0
    #endif
    
    // <o> PDM_CONFIG_CLOCK_FREQ  - Clock frequency
     
    // <134217728=> 1000k 
    // <138412032=> 1032k (default) 
    // <142606336=> 1067k 
    
    #ifndef PDM_CONFIG_CLOCK_FREQ
    #define PDM_CONFIG_CLOCK_FREQ 138412032
    #endif
    
    // <o> PDM_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef PDM_CONFIG_IRQ_PRIORITY
    #define PDM_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer
    //==========================================================
    #ifndef POWER_ENABLED
    #define POWER_ENABLED 0
    #endif
    // <o> POWER_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef POWER_CONFIG_IRQ_PRIORITY
    #define POWER_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <q> POWER_CONFIG_DEFAULT_DCDCEN  - The default configuration of main DCDC regulator
     
    
    // <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
    
    #ifndef POWER_CONFIG_DEFAULT_DCDCEN
    #define POWER_CONFIG_DEFAULT_DCDCEN 0
    #endif
    
    // <q> POWER_CONFIG_DEFAULT_DCDCENHV  - The default configuration of High Voltage DCDC regulator
     
    
    // <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
    
    #ifndef POWER_CONFIG_DEFAULT_DCDCENHV
    #define POWER_CONFIG_DEFAULT_DCDCENHV 0
    #endif
    
    // </e>
    
    // <q> PPI_ENABLED  - nrf_drv_ppi - PPI peripheral driver - legacy layer
     
    
    #ifndef PPI_ENABLED
    #define PPI_ENABLED 0
    #endif
    
    // <e> PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer
    //==========================================================
    #ifndef PWM_ENABLED
    #define PWM_ENABLED 0
    #endif
    // <o> PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin  <0-31> 
    
    
    #ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
    #define PWM_DEFAULT_CONFIG_OUT0_PIN 31
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin  <0-31> 
    
    
    #ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
    #define PWM_DEFAULT_CONFIG_OUT1_PIN 31
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin  <0-31> 
    
    
    #ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
    #define PWM_DEFAULT_CONFIG_OUT2_PIN 31
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin  <0-31> 
    
    
    #ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
    #define PWM_DEFAULT_CONFIG_OUT3_PIN 31
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_BASE_CLOCK  - Base clock
     
    // <0=> 16 MHz 
    // <1=> 8 MHz 
    // <2=> 4 MHz 
    // <3=> 2 MHz 
    // <4=> 1 MHz 
    // <5=> 500 kHz 
    // <6=> 250 kHz 
    // <7=> 125 kHz 
    
    #ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
    #define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_COUNT_MODE  - Count mode
     
    // <0=> Up 
    // <1=> Up and Down 
    
    #ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
    #define PWM_DEFAULT_CONFIG_COUNT_MODE 0
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_TOP_VALUE - Top value 
    #ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
    #define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_LOAD_MODE  - Load mode
     
    // <0=> Common 
    // <1=> Grouped 
    // <2=> Individual 
    // <3=> Waveform 
    
    #ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
    #define PWM_DEFAULT_CONFIG_LOAD_MODE 0
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_STEP_MODE  - Step mode
     
    // <0=> Auto 
    // <1=> Triggered 
    
    #ifndef PWM_DEFAULT_CONFIG_STEP_MODE
    #define PWM_DEFAULT_CONFIG_STEP_MODE 0
    #endif
    
    // <o> PWM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
    #define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <q> PWM0_ENABLED  - Enable PWM0 instance
     
    
    #ifndef PWM0_ENABLED
    #define PWM0_ENABLED 0
    #endif
    
    // <q> PWM1_ENABLED  - Enable PWM1 instance
     
    
    #ifndef PWM1_ENABLED
    #define PWM1_ENABLED 0
    #endif
    
    // <q> PWM2_ENABLED  - Enable PWM2 instance
     
    
    #ifndef PWM2_ENABLED
    #define PWM2_ENABLED 0
    #endif
    
    // <e> PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM.
    
    // <i> The workaround uses interrupts to wake up the CPU and ensure
    // <i> it is active when PWM is about to start a DMA transfer. For
    // <i> initial transfer, done when a playback is started via PPI,
    // <i> a specific EGU instance is used to generate the interrupt.
    // <i> During the playback, the PWM interrupt triggered on SEQEND
    // <i> event of a preceding sequence is used to protect the transfer
    // <i> done for the next sequence to be played.
    //==========================================================
    #ifndef PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
    #define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
    #endif
    // <o> PWM_NRF52_ANOMALY_109_EGU_INSTANCE  - EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
     
    // <0=> EGU0 
    // <1=> EGU1 
    // <2=> EGU2 
    // <3=> EGU3 
    // <4=> EGU4 
    // <5=> EGU5 
    
    #ifndef PWM_NRF52_ANOMALY_109_EGU_INSTANCE
    #define PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5
    #endif
    
    // </e>
    
    // </e>
    
    // <e> QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer
    //==========================================================
    #ifndef QDEC_ENABLED
    #define QDEC_ENABLED 0
    #endif
    // <o> QDEC_CONFIG_REPORTPER  - Report period
     
    // <0=> 10 Samples 
    // <1=> 40 Samples 
    // <2=> 80 Samples 
    // <3=> 120 Samples 
    // <4=> 160 Samples 
    // <5=> 200 Samples 
    // <6=> 240 Samples 
    // <7=> 280 Samples 
    
    #ifndef QDEC_CONFIG_REPORTPER
    #define QDEC_CONFIG_REPORTPER 0
    #endif
    
    // <o> QDEC_CONFIG_SAMPLEPER  - Sample period
     
    // <0=> 128 us 
    // <1=> 256 us 
    // <2=> 512 us 
    // <3=> 1024 us 
    // <4=> 2048 us 
    // <5=> 4096 us 
    // <6=> 8192 us 
    // <7=> 16384 us 
    
    #ifndef QDEC_CONFIG_SAMPLEPER
    #define QDEC_CONFIG_SAMPLEPER 7
    #endif
    
    // <o> QDEC_CONFIG_PIO_A - A pin  <0-31> 
    
    
    #ifndef QDEC_CONFIG_PIO_A
    #define QDEC_CONFIG_PIO_A 31
    #endif
    
    // <o> QDEC_CONFIG_PIO_B - B pin  <0-31> 
    
    
    #ifndef QDEC_CONFIG_PIO_B
    #define QDEC_CONFIG_PIO_B 31
    #endif
    
    // <o> QDEC_CONFIG_PIO_LED - LED pin  <0-31> 
    
    
    #ifndef QDEC_CONFIG_PIO_LED
    #define QDEC_CONFIG_PIO_LED 31
    #endif
    
    // <o> QDEC_CONFIG_LEDPRE - LED pre 
    #ifndef QDEC_CONFIG_LEDPRE
    #define QDEC_CONFIG_LEDPRE 511
    #endif
    
    // <o> QDEC_CONFIG_LEDPOL  - LED polarity
     
    // <0=> Active low 
    // <1=> Active high 
    
    #ifndef QDEC_CONFIG_LEDPOL
    #define QDEC_CONFIG_LEDPOL 1
    #endif
    
    // <q> QDEC_CONFIG_DBFEN  - Debouncing enable
     
    
    #ifndef QDEC_CONFIG_DBFEN
    #define QDEC_CONFIG_DBFEN 0
    #endif
    
    // <q> QDEC_CONFIG_SAMPLE_INTEN  - Sample ready interrupt enable
     
    
    #ifndef QDEC_CONFIG_SAMPLE_INTEN
    #define QDEC_CONFIG_SAMPLE_INTEN 0
    #endif
    
    // <o> QDEC_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef QDEC_CONFIG_IRQ_PRIORITY
    #define QDEC_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer
    //==========================================================
    #ifndef QSPI_ENABLED
    #define QSPI_ENABLED 0
    #endif
    // <o> QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).  <0-255> 
    
    
    #ifndef QSPI_CONFIG_SCK_DELAY
    #define QSPI_CONFIG_SCK_DELAY 1
    #endif
    
    // <o> QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. 
    #ifndef QSPI_CONFIG_XIP_OFFSET
    #define QSPI_CONFIG_XIP_OFFSET 0
    #endif
    
    // <o> QSPI_CONFIG_READOC  - Number of data lines and opcode used for reading.
     
    // <0=> FastRead 
    // <1=> Read2O 
    // <2=> Read2IO 
    // <3=> Read4O 
    // <4=> Read4IO 
    
    #ifndef QSPI_CONFIG_READOC
    #define QSPI_CONFIG_READOC 0
    #endif
    
    // <o> QSPI_CONFIG_WRITEOC  - Number of data lines and opcode used for writing.
     
    // <0=> PP 
    // <1=> PP2O 
    // <2=> PP4O 
    // <3=> PP4IO 
    
    #ifndef QSPI_CONFIG_WRITEOC
    #define QSPI_CONFIG_WRITEOC 0
    #endif
    
    // <o> QSPI_CONFIG_ADDRMODE  - Addressing mode.
     
    // <0=> 24bit 
    // <1=> 32bit 
    
    #ifndef QSPI_CONFIG_ADDRMODE
    #define QSPI_CONFIG_ADDRMODE 0
    #endif
    
    // <o> QSPI_CONFIG_MODE  - SPI mode.
     
    // <0=> Mode 0 
    // <1=> Mode 1 
    
    #ifndef QSPI_CONFIG_MODE
    #define QSPI_CONFIG_MODE 0
    #endif
    
    // <o> QSPI_CONFIG_FREQUENCY  - Frequency divider.
     
    // <0=> 32MHz/1 
    // <1=> 32MHz/2 
    // <2=> 32MHz/3 
    // <3=> 32MHz/4 
    // <4=> 32MHz/5 
    // <5=> 32MHz/6 
    // <6=> 32MHz/7 
    // <7=> 32MHz/8 
    // <8=> 32MHz/9 
    // <9=> 32MHz/10 
    // <10=> 32MHz/11 
    // <11=> 32MHz/12 
    // <12=> 32MHz/13 
    // <13=> 32MHz/14 
    // <14=> 32MHz/15 
    // <15=> 32MHz/16 
    
    #ifndef QSPI_CONFIG_FREQUENCY
    #define QSPI_CONFIG_FREQUENCY 15
    #endif
    
    // <s> QSPI_PIN_SCK - SCK pin value.
    #ifndef QSPI_PIN_SCK
    #define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <s> QSPI_PIN_CSN - CSN pin value.
    #ifndef QSPI_PIN_CSN
    #define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <s> QSPI_PIN_IO0 - IO0 pin value.
    #ifndef QSPI_PIN_IO0
    #define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <s> QSPI_PIN_IO1 - IO1 pin value.
    #ifndef QSPI_PIN_IO1
    #define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <s> QSPI_PIN_IO2 - IO2 pin value.
    #ifndef QSPI_PIN_IO2
    #define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <s> QSPI_PIN_IO3 - IO3 pin value.
    #ifndef QSPI_PIN_IO3
    #define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED
    #endif
    
    // <o> QSPI_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef QSPI_CONFIG_IRQ_PRIORITY
    #define QSPI_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer
    //==========================================================
    #ifndef RNG_ENABLED
    #define RNG_ENABLED 0
    #endif
    // <q> RNG_CONFIG_ERROR_CORRECTION  - Error correction
     
    
    #ifndef RNG_CONFIG_ERROR_CORRECTION
    #define RNG_CONFIG_ERROR_CORRECTION 1
    #endif
    
    // <o> RNG_CONFIG_POOL_SIZE - Pool size 
    #ifndef RNG_CONFIG_POOL_SIZE
    #define RNG_CONFIG_POOL_SIZE 64
    #endif
    
    // <o> RNG_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef RNG_CONFIG_IRQ_PRIORITY
    #define RNG_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer
    //==========================================================
    #ifndef RTC_ENABLED
    #define RTC_ENABLED 0
    #endif
    // <o> RTC_DEFAULT_CONFIG_FREQUENCY - Frequency  <16-32768> 
    
    
    #ifndef RTC_DEFAULT_CONFIG_FREQUENCY
    #define RTC_DEFAULT_CONFIG_FREQUENCY 32768
    #endif
    
    // <q> RTC_DEFAULT_CONFIG_RELIABLE  - Ensures safe compare event triggering
     
    
    #ifndef RTC_DEFAULT_CONFIG_RELIABLE
    #define RTC_DEFAULT_CONFIG_RELIABLE 0
    #endif
    
    // <o> RTC_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
    #define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <q> RTC0_ENABLED  - Enable RTC0 instance
     
    
    #ifndef RTC0_ENABLED
    #define RTC0_ENABLED 0
    #endif
    
    // <q> RTC1_ENABLED  - Enable RTC1 instance
     
    
    #ifndef RTC1_ENABLED
    #define RTC1_ENABLED 0
    #endif
    
    // <q> RTC2_ENABLED  - Enable RTC2 instance
     
    
    #ifndef RTC2_ENABLED
    #define RTC2_ENABLED 0
    #endif
    
    // <o> NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt 
    #ifndef NRF_MAXIMUM_LATENCY_US
    #define NRF_MAXIMUM_LATENCY_US 2000
    #endif
    
    // </e>
    
    // <e> SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer
    //==========================================================
    #ifndef SAADC_ENABLED
    #define SAADC_ENABLED 0
    #endif
    // <o> SAADC_CONFIG_RESOLUTION  - Resolution
     
    // <0=> 8 bit 
    // <1=> 10 bit 
    // <2=> 12 bit 
    // <3=> 14 bit 
    
    #ifndef SAADC_CONFIG_RESOLUTION
    #define SAADC_CONFIG_RESOLUTION 1
    #endif
    
    // <o> SAADC_CONFIG_OVERSAMPLE  - Sample period
     
    // <0=> Disabled 
    // <1=> 2x 
    // <2=> 4x 
    // <3=> 8x 
    // <4=> 16x 
    // <5=> 32x 
    // <6=> 64x 
    // <7=> 128x 
    // <8=> 256x 
    
    #ifndef SAADC_CONFIG_OVERSAMPLE
    #define SAADC_CONFIG_OVERSAMPLE 0
    #endif
    
    // <q> SAADC_CONFIG_LP_MODE  - Enabling low power mode
     
    
    #ifndef SAADC_CONFIG_LP_MODE
    #define SAADC_CONFIG_LP_MODE 0
    #endif
    
    // <o> SAADC_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef SAADC_CONFIG_IRQ_PRIORITY
    #define SAADC_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer
    //==========================================================
    #ifndef SPIS_ENABLED
    #define SPIS_ENABLED 0
    #endif
    // <o> SPIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
    #define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <o> SPIS_DEFAULT_MODE  - Mode
     
    // <0=> MODE_0 
    // <1=> MODE_1 
    // <2=> MODE_2 
    // <3=> MODE_3 
    
    #ifndef SPIS_DEFAULT_MODE
    #define SPIS_DEFAULT_MODE 0
    #endif
    
    // <o> SPIS_DEFAULT_BIT_ORDER  - SPIS default bit order
     
    // <0=> MSB first 
    // <1=> LSB first 
    
    #ifndef SPIS_DEFAULT_BIT_ORDER
    #define SPIS_DEFAULT_BIT_ORDER 0
    #endif
    
    // <o> SPIS_DEFAULT_DEF - SPIS default DEF character  <0-255> 
    
    
    #ifndef SPIS_DEFAULT_DEF
    #define SPIS_DEFAULT_DEF 255
    #endif
    
    // <o> SPIS_DEFAULT_ORC - SPIS default ORC character  <0-255> 
    
    
    #ifndef SPIS_DEFAULT_ORC
    #define SPIS_DEFAULT_ORC 255
    #endif
    
    // <q> SPIS0_ENABLED  - Enable SPIS0 instance
     
    
    #ifndef SPIS0_ENABLED
    #define SPIS0_ENABLED 0
    #endif
    
    // <q> SPIS1_ENABLED  - Enable SPIS1 instance
     
    
    #ifndef SPIS1_ENABLED
    #define SPIS1_ENABLED 0
    #endif
    
    // <q> SPIS2_ENABLED  - Enable SPIS2 instance
     
    
    #ifndef SPIS2_ENABLED
    #define SPIS2_ENABLED 0
    #endif
    
    // <q> SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 Anomaly 109 workaround for SPIS.
     
    
    // <i> The workaround uses a GPIOTE channel to generate interrupts
    // <i> on falling edges detected on the CSN line. This will make
    // <i> the CPU active for the moment when SPIS starts DMA transfers,
    // <i> and this way the transfers will be protected.
    // <i> This workaround uses GPIOTE driver, so this driver must be
    // <i> enabled as well.
    
    #ifndef SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
    #define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
    #endif
    
    // </e>
    
    // <e> SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer
    //==========================================================
    #ifndef SPI_ENABLED
    #define SPI_ENABLED 0
    #endif
    // <o> SPI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
    #define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <o> NRF_SPI_DRV_MISO_PULLUP_CFG  - MISO PIN pull-up configuration.
     
    // <0=> NRF_GPIO_PIN_NOPULL 
    // <1=> NRF_GPIO_PIN_PULLDOWN 
    // <3=> NRF_GPIO_PIN_PULLUP 
    
    #ifndef NRF_SPI_DRV_MISO_PULLUP_CFG
    #define NRF_SPI_DRV_MISO_PULLUP_CFG 1
    #endif
    
    // <e> SPI0_ENABLED - Enable SPI0 instance
    //==========================================================
    #ifndef SPI0_ENABLED
    #define SPI0_ENABLED 0
    #endif
    // <q> SPI0_USE_EASY_DMA  - Use EasyDMA
     
    
    #ifndef SPI0_USE_EASY_DMA
    #define SPI0_USE_EASY_DMA 1
    #endif
    
    // </e>
    
    // <e> SPI1_ENABLED - Enable SPI1 instance
    //==========================================================
    #ifndef SPI1_ENABLED
    #define SPI1_ENABLED 0
    #endif
    // <q> SPI1_USE_EASY_DMA  - Use EasyDMA
     
    
    #ifndef SPI1_USE_EASY_DMA
    #define SPI1_USE_EASY_DMA 1
    #endif
    
    // </e>
    
    // <e> SPI2_ENABLED - Enable SPI2 instance
    //==========================================================
    #ifndef SPI2_ENABLED
    #define SPI2_ENABLED 0
    #endif
    // <q> SPI2_USE_EASY_DMA  - Use EasyDMA
     
    
    #ifndef SPI2_USE_EASY_DMA
    #define SPI2_USE_EASY_DMA 1
    #endif
    
    // </e>
    
    // <q> SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for SPIM.
     
    
    // <i> The workaround uses interrupts to wake up the CPU by catching
    // <i> a start event of zero-length transmission to start the clock. This 
    // <i> ensures that the DMA transfer will be executed without issues and
    // <i> that the proper transfer will be started. See more in the Errata 
    // <i> document or Anomaly 109 Addendum located at 
    // <i> https://infocenter.nordicsemi.com/
    
    #ifndef SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
    #define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
    #endif
    
    // </e>
    
    // <e> TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer
    //==========================================================
    #ifndef TIMER_ENABLED
    #define TIMER_ENABLED 1
    #endif
    // <o> TIMER_DEFAULT_CONFIG_FREQUENCY  - Timer frequency if in Timer mode
     
    // <0=> 16 MHz 
    // <1=> 8 MHz 
    // <2=> 4 MHz 
    // <3=> 2 MHz 
    // <4=> 1 MHz 
    // <5=> 500 kHz 
    // <6=> 250 kHz 
    // <7=> 125 kHz 
    // <8=> 62.5 kHz 
    // <9=> 31.25 kHz 
    
    #ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
    #define TIMER_DEFAULT_CONFIG_FREQUENCY 0
    #endif
    
    // <o> TIMER_DEFAULT_CONFIG_MODE  - Timer mode or operation
     
    // <0=> Timer 
    // <1=> Counter 
    
    #ifndef TIMER_DEFAULT_CONFIG_MODE
    #define TIMER_DEFAULT_CONFIG_MODE 0
    #endif
    
    // <o> TIMER_DEFAULT_CONFIG_BIT_WIDTH  - Timer counter bit width
     
    // <0=> 16 bit 
    // <1=> 8 bit 
    // <2=> 24 bit 
    // <3=> 32 bit 
    
    #ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
    #define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
    #endif
    
    // <o> TIMER_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
    #define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <q> TIMER0_ENABLED  - Enable TIMER0 instance
     
    
    #ifndef TIMER0_ENABLED
    #define TIMER0_ENABLED 1
    #endif
    
    // <q> TIMER1_ENABLED  - Enable TIMER1 instance
     
    
    #ifndef TIMER1_ENABLED
    #define TIMER1_ENABLED 0
    #endif
    
    // <q> TIMER2_ENABLED  - Enable TIMER2 instance
     
    
    #ifndef TIMER2_ENABLED
    #define TIMER2_ENABLED 0
    #endif
    
    // <q> TIMER3_ENABLED  - Enable TIMER3 instance
     
    
    #ifndef TIMER3_ENABLED
    #define TIMER3_ENABLED 0
    #endif
    
    // <q> TIMER4_ENABLED  - Enable TIMER4 instance
     
    
    #ifndef TIMER4_ENABLED
    #define TIMER4_ENABLED 0
    #endif
    
    // </e>
    
    // <e> TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer
    //==========================================================
    #ifndef TWIS_ENABLED
    #define TWIS_ENABLED 0
    #endif
    // <q> TWIS0_ENABLED  - Enable TWIS0 instance
     
    
    #ifndef TWIS0_ENABLED
    #define TWIS0_ENABLED 0
    #endif
    
    // <q> TWIS1_ENABLED  - Enable TWIS1 instance
     
    
    #ifndef TWIS1_ENABLED
    #define TWIS1_ENABLED 0
    #endif
    
    // <q> TWIS_ASSUME_INIT_AFTER_RESET_ONLY  - Assume that any instance would be initialized only once
     
    
    // <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
    
    #ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
    #define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
    #endif
    
    // <q> TWIS_NO_SYNC_MODE  - Remove support for synchronous mode
     
    
    // <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
    
    #ifndef TWIS_NO_SYNC_MODE
    #define TWIS_NO_SYNC_MODE 0
    #endif
    
    // <o> TWIS_DEFAULT_CONFIG_ADDR0 - Address0 
    #ifndef TWIS_DEFAULT_CONFIG_ADDR0
    #define TWIS_DEFAULT_CONFIG_ADDR0 0
    #endif
    
    // <o> TWIS_DEFAULT_CONFIG_ADDR1 - Address1 
    #ifndef TWIS_DEFAULT_CONFIG_ADDR1
    #define TWIS_DEFAULT_CONFIG_ADDR1 0
    #endif
    
    // <o> TWIS_DEFAULT_CONFIG_SCL_PULL  - SCL pin pull configuration
     
    // <0=> Disabled 
    // <1=> Pull down 
    // <3=> Pull up 
    
    #ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
    #define TWIS_DEFAULT_CONFIG_SCL_PULL 0
    #endif
    
    // <o> TWIS_DEFAULT_CONFIG_SDA_PULL  - SDA pin pull configuration
     
    // <0=> Disabled 
    // <1=> Pull down 
    // <3=> Pull up 
    
    #ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
    #define TWIS_DEFAULT_CONFIG_SDA_PULL 0
    #endif
    
    // <o> TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
    #define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer
    //==========================================================
    #ifndef TWI_ENABLED
    #define TWI_ENABLED 1
    #endif
    // <o> TWI_DEFAULT_CONFIG_FREQUENCY  - Frequency
     
    // <26738688=> 100k 
    // <67108864=> 250k 
    // <104857600=> 400k 
    
    #ifndef TWI_DEFAULT_CONFIG_FREQUENCY
    #define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
    #endif
    
    // <q> TWI_DEFAULT_CONFIG_CLR_BUS_INIT  - Enables bus clearing procedure during init
     
    
    #ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
    #define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
    #endif
    
    // <q> TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
     
    
    #ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
    #define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
    #endif
    
    // <o> TWI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
    #define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <e> TWI0_ENABLED - Enable TWI0 instance
    //==========================================================
    #ifndef TWI0_ENABLED
    #define TWI0_ENABLED 1
    #endif
    // <q> TWI0_USE_EASY_DMA  - Use EasyDMA (if present)
     
    
    #ifndef TWI0_USE_EASY_DMA
    #define TWI0_USE_EASY_DMA 1
    #endif
    
    // </e>
    
    // <e> TWI1_ENABLED - Enable TWI1 instance
    //==========================================================
    #ifndef TWI1_ENABLED
    #define TWI1_ENABLED 0
    #endif
    // <q> TWI1_USE_EASY_DMA  - Use EasyDMA (if present)
     
    
    #ifndef TWI1_USE_EASY_DMA
    #define TWI1_USE_EASY_DMA 0
    #endif
    
    // </e>
    
    // <q> TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for TWIM.
     
    
    // <i> The workaround uses interrupts to wake up the CPU by catching
    // <i> the start event of zero-frequency transmission, clear the 
    // <i> peripheral, set desired frequency, start the peripheral, and
    // <i> the proper transmission. See more in the Errata document or
    // <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/
    
    #ifndef TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
    #define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
    #endif
    
    // </e>
    
    // <e> UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer
    //==========================================================
    #ifndef UART_ENABLED
    #define UART_ENABLED 1
    #endif
    // <o> UART_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
     
    // <0=> Disabled 
    // <1=> Enabled 
    
    #ifndef UART_DEFAULT_CONFIG_HWFC
    #define UART_DEFAULT_CONFIG_HWFC 0
    #endif
    
    // <o> UART_DEFAULT_CONFIG_PARITY  - Parity
     
    // <0=> Excluded 
    // <14=> Included 
    
    #ifndef UART_DEFAULT_CONFIG_PARITY
    #define UART_DEFAULT_CONFIG_PARITY 0
    #endif
    
    // <o> UART_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
     
    // <323584=> 1200 baud 
    // <643072=> 2400 baud 
    // <1290240=> 4800 baud 
    // <2576384=> 9600 baud 
    // <3862528=> 14400 baud 
    // <5152768=> 19200 baud 
    // <7716864=> 28800 baud 
    // <10289152=> 38400 baud 
    // <15400960=> 57600 baud 
    // <20615168=> 76800 baud 
    // <30801920=> 115200 baud 
    // <61865984=> 230400 baud 
    // <67108864=> 250000 baud 
    // <121634816=> 460800 baud 
    // <251658240=> 921600 baud 
    // <268435456=> 1000000 baud 
    
    #ifndef UART_DEFAULT_CONFIG_BAUDRATE
    #define UART_DEFAULT_CONFIG_BAUDRATE 30801920
    #endif
    
    // <o> UART_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
    #define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <q> UART_EASY_DMA_SUPPORT  - Driver supporting EasyDMA
     
    
    #ifndef UART_EASY_DMA_SUPPORT
    #define UART_EASY_DMA_SUPPORT 1
    #endif
    
    // <q> UART_LEGACY_SUPPORT  - Driver supporting Legacy mode
     
    
    #ifndef UART_LEGACY_SUPPORT
    #define UART_LEGACY_SUPPORT 1
    #endif
    
    // <e> UART0_ENABLED - Enable UART0 instance
    //==========================================================
    #ifndef UART0_ENABLED
    #define UART0_ENABLED 1
    #endif
    // <q> UART0_CONFIG_USE_EASY_DMA  - Default setting for using EasyDMA
     
    
    #ifndef UART0_CONFIG_USE_EASY_DMA
    #define UART0_CONFIG_USE_EASY_DMA 1
    #endif
    
    // </e>
    
    // </e>
    
    // <e> USBD_ENABLED - nrf_drv_usbd - USB driver
    //==========================================================
    #ifndef USBD_ENABLED
    #define USBD_ENABLED 0
    #endif
    // <o> USBD_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef USBD_CONFIG_IRQ_PRIORITY
    #define USBD_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <o> USBD_CONFIG_DMASCHEDULER_MODE  - USBD SMA scheduler working scheme
     
    // <0=> Prioritized access 
    // <1=> Round Robin 
    
    #ifndef USBD_CONFIG_DMASCHEDULER_MODE
    #define USBD_CONFIG_DMASCHEDULER_MODE 0
    #endif
    
    // <q> USBD_CONFIG_DMASCHEDULER_ISO_BOOST  - Give priority to isochronous transfers
     
    
    // <i> This option gives priority to isochronous transfers.
    // <i> Enabling it assures that isochronous transfers are always processed,
    // <i> even if multiple other transfers are pending.
    // <i> Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm
    // <i> function is called, so the option is independent of the algorithm chosen.
    
    #ifndef USBD_CONFIG_DMASCHEDULER_ISO_BOOST
    #define USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
    #endif
    
    // <q> USBD_CONFIG_ISO_IN_ZLP  - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready
     
    
    // <i> If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent.
    // <i> Else, there will be no response.
    
    #ifndef USBD_CONFIG_ISO_IN_ZLP
    #define USBD_CONFIG_ISO_IN_ZLP 0
    #endif
    
    // </e>
    
    // <e> WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer
    //==========================================================
    #ifndef WDT_ENABLED
    #define WDT_ENABLED 0
    #endif
    // <o> WDT_CONFIG_BEHAVIOUR  - WDT behavior in CPU SLEEP or HALT mode
     
    // <1=> Run in SLEEP, Pause in HALT 
    // <8=> Pause in SLEEP, Run in HALT 
    // <9=> Run in SLEEP and HALT 
    // <0=> Pause in SLEEP and HALT 
    
    #ifndef WDT_CONFIG_BEHAVIOUR
    #define WDT_CONFIG_BEHAVIOUR 1
    #endif
    
    // <o> WDT_CONFIG_RELOAD_VALUE - Reload value  <15-4294967295> 
    
    
    #ifndef WDT_CONFIG_RELOAD_VALUE
    #define WDT_CONFIG_RELOAD_VALUE 2000
    #endif
    
    // <o> WDT_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef WDT_CONFIG_IRQ_PRIORITY
    #define WDT_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // </e>
    
    // <h> nrfx_qspi - QSPI peripheral driver
    
    //==========================================================
    // </h> 
    //==========================================================
    
    // </h> 
    //==========================================================
    
    // <h> nRF_Drivers_External 
    
    //==========================================================
    // <q> NRF_TWI_SENSOR_ENABLED  - nrf_twi_sensor - nRF TWI Sensor module
     
    
    #ifndef NRF_TWI_SENSOR_ENABLED
    #define NRF_TWI_SENSOR_ENABLED 0
    #endif
    
    // </h> 
    //==========================================================
    
    // <h> nRF_Libraries 
    
    //==========================================================
    // <q> APP_FIFO_ENABLED  - app_fifo - Software FIFO implementation
     
    
    #ifndef APP_FIFO_ENABLED
    #define APP_FIFO_ENABLED 1
    #endif
    
    // <q> APP_GPIOTE_ENABLED  - app_gpiote - GPIOTE events dispatcher
     
    
    #ifndef APP_GPIOTE_ENABLED
    #define APP_GPIOTE_ENABLED 0
    #endif
    
    // <q> APP_PWM_ENABLED  - app_pwm - PWM functionality
     
    
    #ifndef APP_PWM_ENABLED
    #define APP_PWM_ENABLED 0
    #endif
    
    // <e> APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
    //==========================================================
    #ifndef APP_SCHEDULER_ENABLED
    #define APP_SCHEDULER_ENABLED 1
    #endif
    // <q> APP_SCHEDULER_WITH_PAUSE  - Enabling pause feature
     
    
    #ifndef APP_SCHEDULER_WITH_PAUSE
    #define APP_SCHEDULER_WITH_PAUSE 0
    #endif
    
    // <q> APP_SCHEDULER_WITH_PROFILER  - Enabling scheduler profiling
     
    
    #ifndef APP_SCHEDULER_WITH_PROFILER
    #define APP_SCHEDULER_WITH_PROFILER 0
    #endif
    
    // </e>
    
    // <e> APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI
    //==========================================================
    #ifndef APP_SDCARD_ENABLED
    #define APP_SDCARD_ENABLED 0
    #endif
    // <o> APP_SDCARD_SPI_INSTANCE  - SPI instance used
     
    // <0=> 0 
    // <1=> 1 
    // <2=> 2 
    
    #ifndef APP_SDCARD_SPI_INSTANCE
    #define APP_SDCARD_SPI_INSTANCE 0
    #endif
    
    // <o> APP_SDCARD_FREQ_INIT  - SPI frequency
     
    // <33554432=> 125 kHz 
    // <67108864=> 250 kHz 
    // <134217728=> 500 kHz 
    // <268435456=> 1 MHz 
    // <536870912=> 2 MHz 
    // <1073741824=> 4 MHz 
    // <2147483648=> 8 MHz 
    
    #ifndef APP_SDCARD_FREQ_INIT
    #define APP_SDCARD_FREQ_INIT 67108864
    #endif
    
    // <o> APP_SDCARD_FREQ_DATA  - SPI frequency
     
    // <33554432=> 125 kHz 
    // <67108864=> 250 kHz 
    // <134217728=> 500 kHz 
    // <268435456=> 1 MHz 
    // <536870912=> 2 MHz 
    // <1073741824=> 4 MHz 
    // <2147483648=> 8 MHz 
    
    #ifndef APP_SDCARD_FREQ_DATA
    #define APP_SDCARD_FREQ_DATA 1073741824
    #endif
    
    // </e>
    
    // <e> APP_TIMER_ENABLED - app_timer - Application timer functionality
    //==========================================================
    #ifndef APP_TIMER_ENABLED
    #define APP_TIMER_ENABLED 1
    #endif
    // <o> APP_TIMER_CONFIG_RTC_FREQUENCY  - Configure RTC prescaler.
     
    // <0=> 32768 Hz 
    // <1=> 16384 Hz 
    // <3=> 8192 Hz 
    // <7=> 4096 Hz 
    // <15=> 2048 Hz 
    // <31=> 1024 Hz 
    
    #ifndef APP_TIMER_CONFIG_RTC_FREQUENCY
    #define APP_TIMER_CONFIG_RTC_FREQUENCY 0
    #endif
    
    // <o> APP_TIMER_CONFIG_IRQ_PRIORITY  - Interrupt priority
     
    
    // <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
    // <0=> 0 (highest) 
    // <1=> 1 
    // <2=> 2 
    // <3=> 3 
    // <4=> 4 
    // <5=> 5 
    // <6=> 6 
    // <7=> 7 
    
    #ifndef APP_TIMER_CONFIG_IRQ_PRIORITY
    #define APP_TIMER_CONFIG_IRQ_PRIORITY 6
    #endif
    
    // <o> APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. 
    // <i> Size of the queue depends on how many timers are used
    // <i> in the system, how often timers are started and overall
    // <i> system latency. If queue size is too small app_timer calls
    // <i> will fail.
    
    #ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE
    #define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10
    #endif
    
    // <q> APP_TIMER_CONFIG_USE_SCHEDULER  - Enable scheduling app_timer events to app_scheduler
     
    
    #ifndef APP_TIMER_CONFIG_USE_SCHEDULER
    #define APP_TIMER_CONFIG_USE_SCHEDULER 0
    #endif
    
    // <q> APP_TIMER_KEEPS_RTC_ACTIVE  - Enable RTC always on
     
    
    // <i> If option is enabled RTC is kept running even if there is no active timers.
    // <i> This option can be used when app_timer is used for timestamping.
    
    #ifndef APP_TIMER_KEEPS_RTC_ACTIVE
    #define APP_TIMER_KEEPS_RTC_ACTIVE 0
    #endif
    
    // <o> APP_TIMER_SAFE_WINDOW_MS - Maximum possible latency (in milliseconds) of handling app_timer event. 
    // <i> Maximum possible timeout that can be set is reduced by safe window.
    // <i> Example: RTC frequency 16384 Hz, maximum possible timeout 1024 seconds - APP_TIMER_SAFE_WINDOW_MS.
    // <i> Since RTC is not stopped when processor is halted in debugging session, this value
    // <i> must cover it if debugging is needed. It is possible to halt processor for APP_TIMER_SAFE_WINDOW_MS
    // <i> without corrupting app_timer behavior.
    
    #ifndef APP_TIMER_SAFE_WINDOW_MS
    #define APP_TIMER_SAFE_WINDOW_MS 300000
    #endif
    
    // <h> App Timer Legacy configuration - Legacy configuration.
    
    //==========================================================
    // <q> APP_TIMER_WITH_PROFILER  - Enable app_timer profiling
     
    
    #ifndef APP_TIMER_WITH_PROFILER
    #define APP_TIMER_WITH_PROFILER 0
    #endif
    
    // <q> APP_TIMER_CONFIG_SWI_NUMBER  - Configure SWI instance used.
     
    
    #ifndef APP_TIMER_CONFIG_SWI_NUMBER
    #define APP_TIMER_CONFIG_SWI_NUMBER 0
    #endif
    

  • You need to change NRFX_TIMER0_ENABLED/TIMER0_ENABLED to 0, and set NRFX_TIMER1_ENABLED/TIMER1_ENABLED to 1 (or some other timer that is not used by the softdevice). However, I do not think this is your current issue. Are you sure that the error is in app_uart_init, and not a result of that the UART is started? In you previous post, the error seems to come from uart_event_handle(). Try setting a breakpoint in uart_event_handle, inside the if-setting for the APP_UART_COMMUNICATION_ERROR event. If you hit this, check the value passed to APP_ERROR_CHECK.

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  • You need to change NRFX_TIMER0_ENABLED/TIMER0_ENABLED to 0, and set NRFX_TIMER1_ENABLED/TIMER1_ENABLED to 1 (or some other timer that is not used by the softdevice). However, I do not think this is your current issue. Are you sure that the error is in app_uart_init, and not a result of that the UART is started? In you previous post, the error seems to come from uart_event_handle(). Try setting a breakpoint in uart_event_handle, inside the if-setting for the APP_UART_COMMUNICATION_ERROR event. If you hit this, check the value passed to APP_ERROR_CHECK.

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