nRF52832 Pin 11 (P0.09) and Pin 12 (P0.10) is only 3.0V

Question

Hi there, 
 We are using the nRF52832 on our PCB design. We built the first batch and it was working fine, we built a second batch and all the boards are having issues. 
 We first thought it could be a PCB issue but finally narrowed the problem down to these two pins. Pin 11 when assigned as an output and when high is only 3.0V this is the same behaviour on all our boards. All other GPIOs when high is at 3.3V. When Pin 11, which is an enable line to a regulator, is connected it causes Pin 10 to drop to 2.9-3.0V. It does not look like a short. We cannot seem to explain why it does this. Our pin 10 is assigned as an I2C SCL. Our problem for all our boards was that the nRF gets stuck in this while loop when trying to do its first write with I2C 
 while (!nrf_twim_event_check(p_twim, evt_to_wait)) { if (nrf_twim_event_check(p_twim, NRF_TWIM_EVENT_ERROR)) { NRF_LOG_DEBUG("TWIM: Event: %s.
", (uint32_t)EVT_TO_STR_TWIM(NRF_TWIM_EVENT_ERROR)); nrf_twim_event_clear(p_twim, NRF_TWIM_EVENT_ERROR); nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_RESUME); nrf_twim_task_trigger(p_twim, NRF_TWIM_TASK_STOP); evt_to_wait = NRF_TWIM_EVENT_STOPPED; } } 
 
 We never had this problem in the first build. So we took the nRF52 chip from the first build out from one of the baords and put it into our new set of batches and the board works fine. This led us to believe there is something wrong with the batch the nRF52 chips in our second batch. 
 
 Does anyone else have this problem? Any help would be much appreciated. 
 
 Note: I had to repost this since there was an error with the first post not sure if it duplicated. Thanks.

hmolesworth · Accepted Answer

You don't mention whether you are aware that P0.09 and P0.10 default to NFC mode; there are several posts here discussing this issue, try this link. Code in system_nrf52.c will need to generate something like this (which only executes once so can also be done by other means):

    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
       normal GPIOs. */
    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos; // Write Enable
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos; // Read-only Enable
            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
            // UICR changes require a reset to be effective
            NVIC_SystemReset();
        }
    #endif

From the datasheet:

For information on how to configure these pins as normal GPIOs, see NFCT — Near field communication tag on page 416 and UICR — User information configuration registers on page 54. Note that the device will not be protected against strong NFC field damage if the pins are configured as GPIO and an NFC antenna is connected to the device. The pins will always be configured as NFC pins during power-on reset until the configuration is set according to the UICR register.
These two pins will have some limitations when configured as GPIO. The pin capacitance will be higher on these pins, and there is some current leakage between the two pins if they are driven to different logical values. To avoid leakage between the pins when configured as GPIO, these GPIOs should always be at the same logical value whenever entering one of the device power saving modes. See Electrical specification.

nRF52832 Pin 11 (P0.09) and Pin 12 (P0.10) is only 3.0V

Top Replies