I was puzzled by RM.
I notice POWER control register in peripheral(UART,SPI,TWI) module.
Please answer following questions about the relation between system power and the peripheral power register value.
- Will UART be powered when system power off and uart register power on?
- Will UART be powered when system power on (constant latency) and UART register power off?
- Will UART be powered when system power on (low power) and UART register power off?
Will system control logic shutdow power of modules when system in power on (low power) mode?
Alternatively, you can answer next question.
Is there any possible that UART be power off by control logic, when system power on (low power) and UART register power on?
If yes, can registers retention their values?
What does IDLE and RUN mean in RM/PS, is it something about clock gating?
Is IDLE the only low power mode of model?
- Will module clock be automatically gated in IDLE mode?
- How does control logic knows module in IDLE mode?
- Can clock automatically on when needed, eg. new byte comes in UART?
- Is this schematic transparent to software?
What is the relationship between ENABLE and IDLE state?
Is it possible for a module to enter IDLE when ENABLE is true?
- Will it be IDLE when not enabled?
- Will it be RUN once enabled?
- Will it be IDLE when not transmitting and not receiving?
- Will it be RUN only when transmitting or receiving?
Thanks a lot!
Edit: format, tags.