Devices stuck in high current debug mode.

[modles]

Hi. I have an urgent issue where after using the JLINK disk programming function on the NRF52-DK, my device is stuck in high current (3ma) debug mode until power is cycled. I have several devices out in the field that are stuck in this mode due to non cycling of the power. I can perform and OTA firmware update to these devices, so is there any sdk command or register change that I can make to kick these devices out of debug mode and back into normal mode!? Thanks
Ben

[modles]

Basically I need to find a way to shutdown/reset the DAP via firmware!

[Susheel Nuguru]

If you do not have access to the device, then i think only below two options are left for you

Watchdog reset and a Pin Reset.

!) watchdog reset, you can initialized and enable the watchdog only once (based on a persistent variable) will reset the device only one and on the wakeup will never start the watchdog.

2) pull the reset pin low as configured in NRF_UICR->PSELRESET[0] and PSELRESET[1]

[modles]

I'm afraid this does not reduce the current. Only a power cycle seems to reduce the power usage.  So my feeling is its the SWJ-DP not the Debug you highlight. 

[modles]

Could there be an undocumented way to get the SW-DP to de-assert CxxPWRUPREQ?

[Susheel Nuguru]

Sorry, my bad, I have tried to dig a bit more on this. It need to be a power cycle or brown out reset. You can do a debug reset from the SWD pins but you do not have access to that. So there are no other way other than powre cycle and BOR unfortunately.

[mikeg78]

I have a similar problem with a battery powered device that has debug pins exposed but no way of disconnecting the battery without damaging the device. How is a debug reset performed? I have found that shorting the debug pins to ground followed by the reset pin does not consistently get the chip out of this 3mA state, nor does the device consistently enter this state after programming. Is this a silicon bug?