SWD causing undesirable reset

[Charles Manning]

Hello

I have an nRF51822 serving as s supervisory micro for an embedded Linux board. Two GPIO pins from the main CPU are hooked up to the nRF51822 to implement SWD for the purpose of upgrading the nRF.

I have written all the SWD code and the upgrade mechanism works fine, all except for one thing....

Occasionally, maybe one of of 10 times, the DIF does not appear to switch out of normal mode and the nRF seems to see the first changes on the SWDIO line as a reset.

The reason I believe their is a reset happing is that one of the GPIO pins I am monitoring changes from output to input.

I send a preample of:

• Drive SWDIO line high. (it is already high anyway).
• Send 150 strobes on SWDCLK, ending with SWDCLK high. Since this is driven by software, the frequency is 1.7MHz, but there are some stalls.
• Send JTAG->SWD magic code. This is what occasionally triggers the reset.
• Send 150 more 1 bits. ...

Even though the JTAG to SWD code triggers a reset, the device still enters debug mode and access to the internal debug is fine. It appears that the DIF is passing though the SWD signals, yet it still triggering a reset.

Are there any subtleties to getting the DIF to correctly leave Normal mode?

[Asbjørn]

The first time you enter DIF a change to SWDIO line causes a reset due to the multiplexing with the nRESET functionality. So first time you enter DIF you should expect this. After that you will have to enable the reset functionality again from the RESET register.

[Charles Manning]

Thanks, but there seems more to it than that. This does not appear to be deterministic.

I think it would be good to clarify the documentation. The documentation seems to imply that this will not cause a reset.

What seems strange to me is that I don't always see it causing a reset.

I have code that does this:

Enter debug mode. Fiddle some registers. Exit debug mode (ie. enable reset) Force a reset by holding SWDIO and SWDCLK low for approx 10msec. Release IO pins so that SWDIO/RESET goes high and SWDCLK stays low.

If I run this program multiple times (eg. 1/second) I see the RESET during the preamble only about once per ten times.