Hi,
Is there a detailed analogue circuit model available for the GPIO pins on nRF52. Most of all, I am interested in the circuit model (or SPICE model) for the IO pin when the nRF52 is off (VDD = 0), but would also be interested in detailed circuit models in all states.
I have fully examined the Product Spec, and it only gives a functional schematic and few electrical specifications. I have estimated the model considering the the IO will have protection diodes (expect around 0.3V based on max rantings, measured around 1V), and some impedance to ground (measured 40kOhm), combined with the pad capacitance (specified as 3pF in the Product spec)
Thanks :)
