hi all
i have been working on a raspberry pi hat design and i would like feedback on it's design
this is the link to the github repo and i do update it regularly https://github.com/sentinelinfinitus/nrf52840-pi-sheild
fair warning i used kicad and for some parts were added using mousers library loader
if you see some things i am doing wrong or have any suggestions on how to do some things better please let me know
Hi,
I updated my KiCad application, that seemed to do the trick. Please verify that what I am seeing is correct though:
This is not good, and probably will not work at all. I recommend that you take a look at our reference layout, there are pdf files which you can look at. Rotate the nRF 90 degrees clockwise so that the ANT pin points towards the RF components and place components similar to the reference layout. You have loads of available space, there is no reason to place components all over the place.
When the ref. layout is replicated you can route GPIOs to targets on their respective side. If any pins are to be connected to anything on the opposite side of the chip it is better to see if you can re-assign the trace to a GPIO on the side which points towards the target, instead of routing a bunch of traces around the chip.
Lastly, add a ground pour in the outer layers and connect all component ground pads directly to it, no wire grounding.
Best regards,
Andreas
hi Andreas
unfortunately i was using library's that i found online but they were missing pads on the footprint/schematic
that being said i have taken the time to learn how to make parts and have created the part to the best of my ability (it came out as good as i thought it would)
if you want to take a look at the part in the editor the same library adding instructions i had before should work as long as you use the location of the part i created
the part is in the parts folder under the folder [sentinel]
here is what i have though
here is what the footprint looks like
this is the settings for the red pads
this is the clearances of the red pads
the yellow pad settings (please note they are through hole because that was the only way i could get them go to other layers)
yellow pad clearance
3d
i know it does not follow the aqf73 guideline too well but it was the best i could do based on my limited experience with making kicad parts
it would be nice if in the future nordic made kicad parts available in the future or if nordic want to make this part available to people i would not mind
Hi,
This looks quite good. As you say, the reference design uses blind/micro vias in the inner-row pins. This is to make sure the SoC has good ground in that the center pad is connected to a solid plane in either inner or bottom layers. By using through hole vias this will no longer be the case, the vias wil break up the ground plane which might keep certain sensitive parts in the SoC from operating as specified.
There are some ways to workaround this, by not using all the inner-row pins there will be better grounding overall. In addition there are some pins that you easily can route outside through the top layer. The ANT pin and the VSS_PA pin should also not have vias in them.
I have also seen examples of designs where the inner-row pins have been routed out in the top layer between the pads of the outer-row pins. This obviously will depend on the capabilities of your PCB supplier and EMS. You might also have to make the pads of the outer-row pins a little smaller.
Best regards,
Andras
