Double representation in chip, really??

[Gustav]

Hi Nordic

I am looking at legacy code in nRF24LE1 that has to be ported to a new chip, nRF52xx.

The thing that I have come across is a strange thing in the datasheet of nRF24LE1: It appears as there are two different status registers  that give the status of the FIFO status of the enhanced shock-burst.  That is just strange! I think normally there will always be only one status for each register.

It is STATUS (Hex 0x07) and FIFO_STATUS (Hex 0x17) in the  "register map table" (page 50 in the datasheet)

that appears to give the same information.

For our application, STATUS, have all the information necessary. So I would like to change the code from using FIFO_STATUS at all, and only use STATUS.

My question is: Is there any difference btw the two registers? For eksample time difference in when they get updated?

PS: The reason for wanting to only use STATUS (and not FIFO_STATUS) is speed. STATUS is the only register that has pipe information for the RX_FIFO. And so, the code can be written more effectively if FIFO_STATUS is replaced by STATUS.

[Gustav]

Just to clarify. The apparent double representations in the nRF24LE1 are here:

1)

STATUS bit 0 is TX_FULL

and

FIFO_STATUS bit 5 is "also?" TX_FULL

2)

STATUS bit 3:1 RX_P_NO is RX_EMPTY

and

FIFO_STATUS bit 0 is "also?" RX_EMPTY

I am just wondering if they are exactly the same or if there could in some circumstances be a reason to read from the STATUS register instead of the FIFO_STATUS register, or vice versa.

[run_ar]

1) These are the same.

2) As you say you have data pipe information in addition in the status register. So you should check that.