SPIS consumption

[agusuyu]

Hello,

We are using the SPIS on the nRF52832. We are seeing a higher than expected consumption when it's enabled and not used.

I measure around 7uA extra when enabling, which goes away if I disable it.

The ports are properly driven from the master. Am I doing something wrong? The spec says it should be 1uA, not 7.

I reduced the code to the one below, just commenting or not the Disable line.

 spis_init();
 NRF_SPIS1->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos);

 for (;;)
    {
        idle_state_handle();
    }

[agusuyu]

I'm attaching images of current measurement.

The first one is with SPI Disabled, the second Enabled. The difference is ~7uA.

[agusuyu]

In trying to figure out what's happening I switched from SPIS to SPIM and I don't have the extra 7uA.

All measurements from a DK (PCA10040) give exact same results using SDK examples (without CONSTLAT).

I can't find anything that would explain this other than it's just what it draws and the 1uA from the spec is wrong. Could that be the case?

[agusuyu]

Does anyone see the same thing?

My latest test was to check if it's the "interrupt" on CS.

I'm trying with the example pin_change_int and I get the same current consumption. Could this be it? Even though according to the spec it should be <1uA.

[agusuyu]

Does anyone see the same thing?

My latest test was to check if it's the "interrupt" on CS.

I'm trying with the example pin_change_int and I get the same current consumption. Could this be it? Even though according to the spec it should be <1uA.

[Stian Røed Hafskjold]

Hi, When the SPIS is waiting for an interrupt in the CS pin, the power consumption is similar to the GPIOTE IN event. You can try to trigger on the GPIOTE PORT event instead, and enable the slave in the interrupt handler.