SAADC CMR

[Sahar]

Hi,

In the documentaton nERF52832_PS_v1.4, the common mode rejection ratio of the ADC when used in differential inputs is not given in the electrical specifications, where can i found this information?

Thank you in advance

[Jørgen Holmefjord]

Hi,

Unfortunately, we do not have measurements of CMRR for the SAADC. However, based on simulations, it is expected to be better than 50 dB.

Best regards,
Jørgen

[Jørgen Holmefjord]

The input range is per channel. If you for instance, have Vp=450mV, Vn=150mV in 10-bit mode, the digital output will give:

RESULT = (0.450 – 0.150) * (4/0.6) * 2(10 - 1) = 1024

[Sahar]

What if I have Vp = 2.3V and Vn =2V ? in differential voltage we have 0.3V as in your example, but we have a common mode voltage higher than 300mV, is that acceptable?

[Jørgen Holmefjord]

I'm sorry, my previous answer was not entirely correct. I tested this on a DK, and the digital result in differential 10 bit mode will be -511 to +511. This means that Vn can be +/-150mV compared to Vp, within the input range of 0 to VDD. For instance Vp = 2.00 V, Vn = 2.15 V, or Vp = 2.00 V, Vn = 1.85 V.

[Sahar]

Thank you ! So it is a real differential ADC.