HardFault on sd_ble_gap_adv_stop()

Question

Hi, 
 I'm getting a Hardfault MemManage (IPSR 003) when calling sd_ble_gap_adv_stop(). The advertising handle I'm passing is 0. This is called after the advertising has started using the ble_advertising library. That takes care of calling sd_ble_gap_adv_set_configure() to set the advertising handle. 
 I'm using the hardfault library from the SDK and it's printing this: 
 HARD FAULT at 0x0002FE9A
 R0: 0x00000000 R1: 0x00000000 R2: 0x1018F01D R3: 0x00000000
 R12: 0x00000000 LR: 0x000304EB PSR: 0x01000016 
 I took a look at the .map file and confirmed that this address is within the sd_ble_gap_adv_stop() function. 
 .text.sd_ble_gap_adv_set_configure
 0x000000000002fe94 0x4 ./piavet/ble/advertising/advertising_mngr.o
 .text.sd_ble_gap_adv_stop
 0x000000000002fe98 0x4 ./piavet/ble/advertising/advertising_mngr.o
 .text.sd_ble_gap_tx_power_set
 0x000000000002fe9c 0x4 ./piavet/ble/advertising/advertising_mngr.o 
 I saw a couple of threads about this in the DevZone but none of them have answers. Any clues?

Vidar Berg · Accepted Answer

Hi, 
 It appears to be called from your GPIOTE IRQ handler based on the PSR value. What's the interrupt priority of this IRQ? I'm wondering if it might be higher than the SV call?

Vidar Berg · Answer

Sure:) 
 The last bits of the PSR register shows the current ISR number ( ARM doc ): So 0x01000016 corresponds to ISR number 0x16. Then I subtract this number by 16 as the non-programmable interrupts start at minus 15 
 0x16 -> 22 - 16 = 6. 
 Then you can look up ISR number 6 in the nrf52.h/nrf52xx.h header file: 
 /* =========================================================================================================================== */
/* ================ Interrupt Number Definition ================ */
/* =========================================================================================================================== */

typedef enum {
/* ======================================= ARM Cortex-M4 Specific Interrupt Numbers ======================================== */
 Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset */
 NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempted */
 HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault */
 MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Violation
 and No Match */
 BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory
 related Fault */
 UsageFault_IRQn = -10, /*!< -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition */
 SVCall_IRQn = -5, /*!< -5 System Service Call via SVC instruction */
 DebugMonitor_IRQn = -4, /*!< -4 Debug Monitor */
 PendSV_IRQn = -2, /*!< -2 Pendable request for system service */
 SysTick_IRQn = -1, /*!< -1 System Tick Timer */
/* =========================================== nrf52 Specific Interrupt Numbers ============================================ */
 POWER_CLOCK_IRQn = 0, /*!< 0 POWER_CLOCK */
 RADIO_IRQn = 1, /*!< 1 RADIO */
 UARTE0_UART0_IRQn = 2, /*!< 2 UARTE0_UART0 */
 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn= 3, /*!< 3 SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 */
 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn= 4, /*!< 4 SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 */
 NFCT_IRQn = 5, /*!< 5 NFCT */
 GPIOTE_IRQn = 6, /*!< 6 GPIOTE */
 SAADC_IRQn = 7, /*!< 7 SAADC */
 TIMER0_IRQn = 8, /*!< 8 TIMER0 */
 TIMER1_IRQn = 9, /*!< 9 TIMER1 */

HardFault on sd_ble_gap_adv_stop()

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