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nRF9160 > Count pulse on GPIO

Dear Team,

what is the way to do it in Zephyr? 

I have a signal up-to 10kHz, what is the best way to keep the counter in the background?

Thank you and best

Oleh

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  • The ppi_trace sample worked for me.

    I did not get any build errors.

    However, I did have to change the pins used to 10, 11, and 12. You can do this in the Kconfig file in the sample, or by adding the relevant configurations in the prj.conf file.

    Also, the sample should be built as a secure application (use target nrf9160_pca10090, no ns).

  • aha! that was the missing part, thank you!

    I will try for the Secure board. 

    In order to use DPPI on the NonSecure, would this be sufficient:

    PERIPH("NRF_DPPI", NRF_DPPIC_NS, CONFIG_SPM_NRF_DPPIC_NS), // adding to spm.c in the periph_cfg periph[]

    And also: 

     if (IS_ENABLED(CONFIG_SPM_NRF_GPIOTE1_NS)) {
      /* Configure DPPI to be Non-Secure */
      NRF_SPU->DPPI[0].PERM = 0;
     }

    thank you!

  • Almost.

    In addition to

    PERPIH("NRF_DPPI", NRF_DPPIC_NS, CONFIG_SPM_NRF_DPPIC_NS),
    in spm.c:304 and

    if (IS_ENABLED(CONFIG_SPM_NRF_GPIOTE1_NS)) {
        NRF_SPU->DPPI[0].PERM = 0;
    }
    in spm.c:326

    I also had to add

    PERIPH("NRF_RTC0", NRF_RTC0, CONFIG_SPM_NRF_RTC0_NS),
    in spm.c:305,

    config SPM_NRF_DPPIC_NS
    	bool "DPPI is Non-Secure"
    	default y
    
    config SPM_NRF_RTC0_NS
    	bool "RTC0 is Non-Secure"
    	default y
    in ncs/nrf/subsys/spm/Kconfig:180, and

    CONFIG_PPI_TRACE_PIN_RTC_COMPARE_EVT=10
    CONFIG_PPI_TRACE_PIN_RTC_TICK_EVT=11
    CONFIG_PPI_TRACE_PIN_LFCLOCK_STARTED_EVT=12
    in prj.conf

  • Hi Didrik, thanks! that was to make the ppi_trace to work. 

    could you please help on wiring Counter and Timer to get it with DPPI as here: https://devzone.nordicsemi.com/f/nordic-q-a/9036/measuring-input-gpio-pin-frequency-with-soft-device-running ?

  • am I on the right way?

    static void timer_init()
    {
     NRF_TIMER1_NS->TASKS_STOP = 1;
     NRF_TIMER1_NS->MODE = TIMER_MODE_MODE_Timer;
     NRF_TIMER1_NS->PRESCALER = 8; // Fhck / 2^8 
     NRF_TIMER1_NS->CC[0] = 62500; // 62500 - 1s
     
     NRF_TIMER1_NS->BITMODE = (TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos); 
     
     NRF_TIMER1_NS->TASKS_CLEAR = 1;
     NRF_TIMER1_NS->INTENSET = (TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos);
     
     NRF_TIMER1_NS->EVENTS_COMPARE[0] = 0;
    }
    
    static void counter_init()
    {
     NRF_TIMER2_NS->TASKS_STOP = 1; 
     NRF_TIMER2_NS->MODE = TIMER_MODE_MODE_Counter;
     NRF_TIMER2_NS->BITMODE = (TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos);
     NRF_TIMER2_NS->TASKS_CLEAR = 1;
     NRF_TIMER2_NS->EVENTS_COMPARE[0] = 0;
    }
    
    #define SENSE_PIN 13
    static void gpiote_init(uint32_t pin)
    {
     NRF_GPIOTE1_NS->CONFIG[0]  =  0x01 << 0;         // MODE: Event
     NRF_GPIOTE1_NS->CONFIG[0]  |=  SENSE_PIN << 8;       // Pin number
     NRF_GPIOTE1_NS->CONFIG[0]  |=  NRF_GPIOTE_POLARITY_LOTOHI << 16;  // Event rising edge  
    }
    
    static void ppi_timer_stop_counter_init()
    {
     //NRF_DPPIC_NS->CHEN |= 1 << 0;
     //*(&(NRF_DPPIC_NS->CH0_EEP)) = (uint32_t)&NRF_TIMER1_NS->EVENTS_COMPARE[0];
     //*(&(NRF_DPPIC_NS->CH0_TEP)) = (uint32_t)&NRF_TIMER2_NS->TASKS_STOP;
     //NRF_DPPIC_NS->CHENSET |= 1 << 0;
     
     #define EVT_IX_TIMER1__COMPARE 1
     #define TSK_IX_TIMER2__STOP_COUNTER 1
        // Configure GPIOTE Index 0 to be an Event -> 
        nrf_gpiote_event_configure(EVT_IX_TIMER1__COMPARE, nrf_timer_event_address_get(NRF_TIMER1_NS, NRF_TIMER_EVENT_COMPARE_1) ...);
        // Configure GPIOTE Index 1 to be a Task -> 
        nrf_gpiote_task_configure(TSK_IX_TIMER2__STOP_COUNTER, nrf_timer_event_address_get(NRF_TIMER2_NS, NRF_TIMER_TASK_COUNT) ...);
        // Index 0 will Publish on DPPI Channel 0 
        nrf_gpiote_publish_set(NRF_GPIOTE_EVENTS_IN_0, DPPI_CHANNEL);
        // Index 1 will Subscribe on DPPI Channel 0 
        nrf_gpiote_subscribe_set(NRF_GPIOTE_TASKS_OUT_1, DPPI_CHANNEL);
        // Enable Publish and Subscribe 
        nrf_gpiote_event_enable(EVT_IX_TIMER1__COMPARE);
        nrf_gpiote_task_enable(TSK_IX_TIMER2__STOP_COUNTER);
        // Enable DPPI Channel 
        nrf_dppi_channels_enable(NRF_DPPIC, DPPI_BIT_SET(DPPI_CHANNEL));
    }
    
    static void ppi_gpiote_counter_init()
    {
     NRF_DPPIC_NS->CHEN |= 1 << 1;
     *(&(NRF_DPPIC_NS->CH1_EEP)) = (uint32_t)&NRF_GPIOTE1_NS->EVENTS_IN[0];
     *(&(NRF_DPPIC_NS->CH1_TEP)) = (uint32_t)&NRF_TIMER2_NS->TASKS_COUNT;
     NRF_DPPIC_NS->CHENSET |= 1 << 1;
    }

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