nRF9160 > Count pulse on GPIO

[Oleh]

Dear Team,

what is the way to do it in Zephyr? 

I have a signal up-to 10kHz, what is the best way to keep the counter in the background?

Thank you and best

Oleh

[Didrik Rokhaug]

Hi.

You can use Zephyr's GPIO driver to configure interrupts. 

Have a look at the documentation here.

Best regards,

Didrik

[Oleh]

Hi Didrik,

thank you, I'm new to Zephyr so trying to map my nrf knowledge to zephyr

To complement and test the counter on gpio, I thought to put the second DevKit board into generation mode. Could you please point on the right track with how can the generation on-off be done in background on Zephyr?

thanks & best

Oleh

[Oleh]

Hi Didrik,

thank you for the suggestion, It is clear with the pwm part, got it working.

what i am not able to catch is the sensing that frequency on the input part. Tried the gpio to config in input, then reading buffer, seems ok to get bits 0s/1s but somehow to get to the frequency not... i’m stuck.

May I ask you for a snippet?

thank you!

best

Oleh

[Didrik Rokhaug]

Hi.

Here is the code I used to count pulses. It does not calculate the frequency, but that should be easy to do if you see how many pulses you get per unit of time.

reader.zip

Best regards,

Didrik

[Oleh]

Hi, thank you! 

Just a short confirmation question: can I use Gpiote/PPI in Zephyr with nrf91?

Best

Oleh

[Didrik Rokhaug]

Yes, you can use GPIOTE and DPPI on the nRF91.

It looks like Zephyr's GPIO driver uses GPIOTE internally.

The PPI trace sample works with both nRF91 and nRF52 and might be a good starting point on how to use DPPI.

[Oleh]

thanks for the hint! I'm trying it out...

first blocker was: https://devzone.nordicsemi.com/f/nordic-q-a/49657/how-to-link-nrfx-gpiote-and-ppi-in-zephyr/198090#198090 when adding the config -- it picked up.

second blocker is "GPIOTE_IRQn undeclared" for nRF9160 (there are two: GPIOTE0_IRQn/GPIOTE0_IRQn defined in \zephyr\ext\hal\nordic\nrfx\mdk\nrf9160.h)

am I missing something? Or was the ppi_trace never configured+tested on nRF9160? 

Thanks!

[Didrik Rokhaug]

The ppi_trace sample worked for me.

I did not get any build errors.

However, I did have to change the pins used to 10, 11, and 12. You can do this in the Kconfig file in the sample, or by adding the relevant configurations in the prj.conf file.

Also, the sample should be built as a secure application (use target nrf9160_pca10090, no ns).

[Oleh]

aha! that was the missing part, thank you!

I will try for the Secure board. 

In order to use DPPI on the NonSecure, would this be sufficient:

PERIPH("NRF_DPPI", NRF_DPPIC_NS, CONFIG_SPM_NRF_DPPIC_NS), // adding to spm.c in the periph_cfg periph[]

And also: 

 if (IS_ENABLED(CONFIG_SPM_NRF_GPIOTE1_NS)) {
  /* Configure DPPI to be Non-Secure */
  NRF_SPU->DPPI[0].PERM = 0;
 }

thank you!

[Didrik Rokhaug]

Almost.

In addition to

PERPIH("NRF_DPPI", NRF_DPPIC_NS, CONFIG_SPM_NRF_DPPIC_NS),

in spm.c:304 and

if (IS_ENABLED(CONFIG_SPM_NRF_GPIOTE1_NS)) {
    NRF_SPU->DPPI[0].PERM = 0;
}

in spm.c:326

I also had to add

PERIPH("NRF_RTC0", NRF_RTC0, CONFIG_SPM_NRF_RTC0_NS),

in spm.c:305,

config SPM_NRF_DPPIC_NS
	bool "DPPI is Non-Secure"
	default y

config SPM_NRF_RTC0_NS
	bool "RTC0 is Non-Secure"
	default y

in ncs/nrf/subsys/spm/Kconfig:180, and

CONFIG_PPI_TRACE_PIN_RTC_COMPARE_EVT=10
CONFIG_PPI_TRACE_PIN_RTC_TICK_EVT=11
CONFIG_PPI_TRACE_PIN_LFCLOCK_STARTED_EVT=12

in prj.conf

[Oleh]

Hi Didrik, thanks! that was to make the ppi_trace to work. 

could you please help on wiring Counter and Timer to get it with DPPI as here: https://devzone.nordicsemi.com/f/nordic-q-a/9036/measuring-input-gpio-pin-frequency-with-soft-device-running ?

[Oleh]

am I on the right way?

static void timer_init()
{
 NRF_TIMER1_NS->TASKS_STOP = 1;
 NRF_TIMER1_NS->MODE = TIMER_MODE_MODE_Timer;
 NRF_TIMER1_NS->PRESCALER = 8; // Fhck / 2^8 
 NRF_TIMER1_NS->CC[0] = 62500; // 62500 - 1s
 
 NRF_TIMER1_NS->BITMODE = (TIMER_BITMODE_BITMODE_16Bit << TIMER_BITMODE_BITMODE_Pos); 
 
 NRF_TIMER1_NS->TASKS_CLEAR = 1;
 NRF_TIMER1_NS->INTENSET = (TIMER_INTENSET_COMPARE0_Enabled << TIMER_INTENSET_COMPARE0_Pos);
 
 NRF_TIMER1_NS->EVENTS_COMPARE[0] = 0;
}

static void counter_init()
{
 NRF_TIMER2_NS->TASKS_STOP = 1; 
 NRF_TIMER2_NS->MODE = TIMER_MODE_MODE_Counter;
 NRF_TIMER2_NS->BITMODE = (TIMER_BITMODE_BITMODE_24Bit << TIMER_BITMODE_BITMODE_Pos);
 NRF_TIMER2_NS->TASKS_CLEAR = 1;
 NRF_TIMER2_NS->EVENTS_COMPARE[0] = 0;
}

#define SENSE_PIN 13
static void gpiote_init(uint32_t pin)
{
 NRF_GPIOTE1_NS->CONFIG[0]  =  0x01 << 0;         // MODE: Event
 NRF_GPIOTE1_NS->CONFIG[0]  |=  SENSE_PIN << 8;       // Pin number
 NRF_GPIOTE1_NS->CONFIG[0]  |=  NRF_GPIOTE_POLARITY_LOTOHI << 16;  // Event rising edge  
}

static void ppi_timer_stop_counter_init()
{
 //NRF_DPPIC_NS->CHEN |= 1 << 0;
 //*(&(NRF_DPPIC_NS->CH0_EEP)) = (uint32_t)&NRF_TIMER1_NS->EVENTS_COMPARE[0];
 //*(&(NRF_DPPIC_NS->CH0_TEP)) = (uint32_t)&NRF_TIMER2_NS->TASKS_STOP;
 //NRF_DPPIC_NS->CHENSET |= 1 << 0;
 
 #define EVT_IX_TIMER1__COMPARE 1
 #define TSK_IX_TIMER2__STOP_COUNTER 1
    // Configure GPIOTE Index 0 to be an Event -> 
    nrf_gpiote_event_configure(EVT_IX_TIMER1__COMPARE, nrf_timer_event_address_get(NRF_TIMER1_NS, NRF_TIMER_EVENT_COMPARE_1) ...);
    // Configure GPIOTE Index 1 to be a Task -> 
    nrf_gpiote_task_configure(TSK_IX_TIMER2__STOP_COUNTER, nrf_timer_event_address_get(NRF_TIMER2_NS, NRF_TIMER_TASK_COUNT) ...);
    // Index 0 will Publish on DPPI Channel 0 
    nrf_gpiote_publish_set(NRF_GPIOTE_EVENTS_IN_0, DPPI_CHANNEL);
    // Index 1 will Subscribe on DPPI Channel 0 
    nrf_gpiote_subscribe_set(NRF_GPIOTE_TASKS_OUT_1, DPPI_CHANNEL);
    // Enable Publish and Subscribe 
    nrf_gpiote_event_enable(EVT_IX_TIMER1__COMPARE);
    nrf_gpiote_task_enable(TSK_IX_TIMER2__STOP_COUNTER);
    // Enable DPPI Channel 
    nrf_dppi_channels_enable(NRF_DPPIC, DPPI_BIT_SET(DPPI_CHANNEL));
}

static void ppi_gpiote_counter_init()
{
 NRF_DPPIC_NS->CHEN |= 1 << 1;
 *(&(NRF_DPPIC_NS->CH1_EEP)) = (uint32_t)&NRF_GPIOTE1_NS->EVENTS_IN[0];
 *(&(NRF_DPPIC_NS->CH1_TEP)) = (uint32_t)&NRF_TIMER2_NS->TASKS_COUNT;
 NRF_DPPIC_NS->CHENSET |= 1 << 1;
}