NRF9160 k_timer causes bus_fault

[Gabe]

I have a custom board running the MQTT example. I have the board up and running and have been able to run various different pieces of code and the hardware has checked out as functional. The MQTT example works fine and I've updated the code to work AWS IoT. I added the code below and programmed the chip. I immediately get a bus_fault with the code. Once the chip is in the state if I program it with any other code it continues to boot immediately into the bus_fault. I have done full erases of the chip and reprogrammed with basic code and I still get the bus_fault. I stepped through the process slowly with a second board with exactly the same results.

Here is the added code, everything works fine until I add the code for the k_timer.

#define TIMER_INTERVAL_SEC 5
struct k_timer msg_timer;

u16_t counter = 0;

void controller_send_msg(struct k_timer *timer){
 u8_t pld[] = {0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19};
 
 printk("Sending message!");
 data_publish(&client, MQTT_QOS_1_AT_LEAST_ONCE,
				pld, 10);
}


void main(void)
{
    k_timer_init(&msg_timer, controller_send_msg, NULL);
    k_timer_start(&msg_timer, K_SECONDS(TIMER_INTERVAL_SEC), K_SECONDS(TIMER_INTERVAL_SEC));
}

[Gabe]

More information:

The fault happens during boot when the kernel "Set PSP to the highest address of the main stack before enabling interrupts and jumping to main."

Stepping through the code the fault occurs before main() is called and after line 110 in kernel_arch_func.h:

__asm__ volatile (
	"mov   r0,  %0     \n\t"   /* Store _main in R0 */
	"msr   PSP, %1     \n\t"   /* __set_PSP(start_of_main_stack) */
#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
	"cpsie i           \n\t"   /* __enable_irq() */
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	"cpsie if          \n\t"   /* __enable_irq(); __enable_fault_irq() */
	"mov   r1,  #0     \n\t"
	"msr   BASEPRI, r1 \n\t"   /* __set_BASEPRI(0) */
#else

It jumps to:

#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
	/* force unlock interrupts */
	eors.n r0, r0                               <- HERE
	msr BASEPRI, r0

So, by using the k_timer in the fashion above an issue is created with the interrupt configuration that is not cleared with a reprogram of the chip.

[Gabe]

Seems that this could be RTT related, when I turn off RTT the problem goes away. I am able to use RTT until a point and it's unclear when it breaks.

[Gabe]

I have confirmed that RTT is what breaks the chip. Not sure how to get RTT working with the k_timers, most likely need to move the code into workers.