nRF51 SPI strange activity

[astella]

[astella]

I used C:\nRF5_SDK_11.0.0_89a8197\examples\peripheral\spi standard example in order to activate 2 SPI masters

and send data inside a trial super loop.

The strange thing is that clock activity on a SPI master seems to create activity on the mosi of the other master.

Is this something that should not happen. Am I wrong? Is it a hw problem? A library problem? Or just my analyzer not working properly?

Further I think that chip select is lasting too long in respect to the clock activity. Is there a way to modify this behaviour?

Thanks Nordic for your attention and your work.

[ovrebekk]

Hi 

If the signals of the two SPI buses are relatively close together there will be some capacitive coupling between the two, and activity on one bus can affect the other. 

When the chip select line is de-asserted (high) the bus is not being driven by either the master or slave, which means the lines are floating. When they are floating they are easily influenced by interference, which is probably why they appear to follow nearby signals. 

Once you assert chip select then the lines will be pulled either by the master or the slave, and they will be much more robust to interference. 

astella said:

Further I think that chip select is lasting too long in respect to the clock activity. Is there a way to modify this behaviour?

This is probably caused by some delays in the driver. The chip select line is not controlled by the SPI hardware, and is handled by the software in the driver itself. 

You can control chip select from the application if you want, but I doubt this will be much quicker unless you set up the GPIOTE module to connect the pin directly to the SPI events over PPI. 

Best regards
Torbjørn

[astella]

Thank you ovrebekk so much for everything you said, it is very interesting. I have to point out that I have been using a regular PCA10028 board for tests. Not custom hardware. Best regards