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SD Card (FATfs) SPI Clock switching logic levels

Hello,

I noticed this weird bug that coincides with the SD card not initializing using the FATfs.

Basically, I have the SCLK pin of the NRF52DK connected to a breadboard which is also connected to the CLK of an external SD card breakout board and a logic analyzer. The SD card will initialize in this condition, however, if I try to add another slave and thus connecting another device's SCLK pin to the breadboard,  the SD card won't initialize. This makes sense as the breadboard connections are unreliable. Out of curiosity, I used the logic analyzer to see how bad the SCLK line gets when I add the second slave, but the clock still seems fine.

However, there is this weird thing I'm seeing. When I have it in the configuration where the SD card is able to initialize (second slave disconnected), this happens:

The SCLK line switches logic levels for some reason to cap out at around 1.5V instead of 3V... I checked out all the other lines (MISO,MOSI,CS) and they were all still operating at 3V HIGH. But for some reason, the SCLK line forever stays at 1.5V HIGH.

But then, in the configuration where the second slave is connected and thus, the SD card won't initalize, this 1.5V high level thing doesn't occur. The SCLK line uses the 3V HIGH level forever.

This is a weird issue and I'm wondering if there is some weird mode either the FATfs/SD Card  drivers use to make this occur... Or it could just be a hardware problem.

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