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Internal ADC channel to measure VDD (i.e. VDD_nRF) without external components

Dear Nordic. I am working in the device that require the controller to measure its VDD line to ensure that the the device goes into sleeping mode (very low current and do no work) if the VDD_nRF is getting lower than a set voltage level and Keep waking up to see if the VDD_nRF have raised (so it can do work like communicate with other devices, and drive a small display). The main aim of this project is to ensure that the controller does not work until it supply is exhausted. so I need to keep reading the VDD line when it is active and even when it is sleeping i need to keep waking up and check the supply line (VDD_nRF). I have looked around but I could not find such information, only ADC using the analog input pins.

Thank you very much for your help. 

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  • Hi,

    I think your best option is to use the SAADC to sample VDD at a regular interval. The SAADC can use VDD as input directly, without any physical connections, and is has an internal 0.6V reference. The drawback of this is that it has fairly high current consumption (dependant on the sample rate), and you can't put the device in system OFF sleep mode. You will need a timer to trigger the sampling, which is not available in System OFF mode, and the SAADC cannot be used as a wakeup source from System OFF.

    If you can provide a stable external reference, you can also use the LPCOMP — Low power comparator peripheral for this purpose (given that you can connect VDD to one of the analog inputs. The LPCOMP can generate events on UP, DOWN, and CROSS of a given level, and it can even be used to wake the chip from System OFF sleep mode.

    Another alternative is to use the COMP peripheral. This is similar to LPCOMP but can provide an internal reference as well. The drawback of this is the high current consumption (note that this may even be higher when internal reference is used, see I_INT_REF).

    If you would like a warning when the voltage drops below 1.7V, you can enable the POFWARN in the POWER peripheral. Note that this does not give you any event when the voltage rises again.

    Hope this helps!

    Best regards,
    Jørgen

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  • Hi,

    I think your best option is to use the SAADC to sample VDD at a regular interval. The SAADC can use VDD as input directly, without any physical connections, and is has an internal 0.6V reference. The drawback of this is that it has fairly high current consumption (dependant on the sample rate), and you can't put the device in system OFF sleep mode. You will need a timer to trigger the sampling, which is not available in System OFF mode, and the SAADC cannot be used as a wakeup source from System OFF.

    If you can provide a stable external reference, you can also use the LPCOMP — Low power comparator peripheral for this purpose (given that you can connect VDD to one of the analog inputs. The LPCOMP can generate events on UP, DOWN, and CROSS of a given level, and it can even be used to wake the chip from System OFF sleep mode.

    Another alternative is to use the COMP peripheral. This is similar to LPCOMP but can provide an internal reference as well. The drawback of this is the high current consumption (note that this may even be higher when internal reference is used, see I_INT_REF).

    If you would like a warning when the voltage drops below 1.7V, you can enable the POFWARN in the POWER peripheral. Note that this does not give you any event when the voltage rises again.

    Hope this helps!

    Best regards,
    Jørgen

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