This post is older than 2 years and might not be relevant anymore
More Info: Consider searching for newer posts

system reset unexpected, after app_pwm_channel_duty_set

Hallo

I am developing on a NRF51822, sdk12, s130, 

I have encountered a repeated unexpected reset to my device (the reset reason vector register is all 0)

which seems to be triggered by app_pwm_channel_duty_set, when removing it anyway I do not encounter the reset.

I have used a scope to verify that there is no voltage drop during this event.

Although I am in DEBUG mode I do not reach the error handler to view the stack, so basically I have not idea from where exactly the reset comes from, I do not know how to further debug it.

Any help and suggestion will be very much appreciated 

Thanks!

--------------------

This is the relevant code to my main suspects, the PWM

init :

APP_PWM_INSTANCE(PWM1, 1); // Create the instance "PWM1" using TIMER1.
APP_PWM_INSTANCE(PWM2, 2); // Create the instance "PWM2" using TIMER2.

app_pwm_config_t pwm1_cfg = APP_PWM_DEFAULT_CONFIG_2CH(100L, LED_RED, LED_GREEN);
app_pwm_config_t pwm2_cfg = APP_PWM_DEFAULT_CONFIG_1CH(100L, LED_BLUE);

pwm1_cfg.pin_polarity[0] = APP_PWM_POLARITY_ACTIVE_HIGH;
pwm1_cfg.pin_polarity[1] = APP_PWM_POLARITY_ACTIVE_HIGH;
pwm2_cfg.pin_polarity[0] = APP_PWM_POLARITY_ACTIVE_HIGH;

/* Initialize and enable PWM. */
err_code = app_pwm_init(&PWM1, &pwm1_cfg, pwm_ready_callback);
err_code = app_pwm_init(&PWM2, &pwm2_cfg, pwm_ready_callback);

operation :

while (app_pwm_channel_duty_set(&PWM1, 0, red) == NRF_ERROR_BUSY);
while (app_pwm_channel_duty_set(&PWM1, 1, green) == NRF_ERROR_BUSY);
while (app_pwm_channel_duty_set(&PWM2, 0, blue) == NRF_ERROR_BUSY);

Parents
  • Hi,

    If reset reason is 0, then that must mean either that you have already read and cleared reset reason in the application or that VDD have dropped below minimum operating conditions. So I suggest that you measure on VDD again, for instance close to the chip in case the voltage drop may be short. You should also check your schematic, component values and layout follow the reference layout.

    Best regards,
    Kenneth

Reply
  • Hi,

    If reset reason is 0, then that must mean either that you have already read and cleared reset reason in the application or that VDD have dropped below minimum operating conditions. So I suggest that you measure on VDD again, for instance close to the chip in case the voltage drop may be short. You should also check your schematic, component values and layout follow the reference layout.

    Best regards,
    Kenneth

Children
Related