nrf52 WDT LFCLK sourcing

[Matt Brindle]

Hi,

I would like to check my understanding of exactiy how the sourcing and configuration of the LFCLK works when using a WDT and doing soft resets.

I found these statements in the datasheet LFCLK and WDT sections:

"It is not allowed to write to register LFCLKSRC on page 94 when the LFCLK is running."

"A countdown watchdog timer using the low-frequency clock source (LFCLK) offers configurable and robust protection against application lock-up ... When started, the watchdog will automatically force the 32.768 kHz RC oscillator on as long as no other 32.768 kHz clock source is running and generating the 32.768 kHz system clock"

This seems to state that:

1. The WDT will start the LFCLK, sourced from the internal RC, if the LFCLK is not active

2. Once the WDT is started, the LFCLK source cannot be changed

3. As the WDT remains active after a soft reset, the LFCLK will not need to be be restarted

I have observed that changing the LFCLKSRC to an external source and 'starting' the LFCLK after the WDT is already running does seem to work - all of the LFCLK registers show the TCXO is configured as the source and running, and the timing accuracy does seem consistent with 5ppm.

Also, I have read from this thread that the LFCLK needs to be reconfigured and started after a soft reset when the WDT is active:

"The WDT will force the LFCLK on, but the system will be cleared when performing a SystemReset(). LFCLK will still run at this point, regardless of what is reflected in the LFCLKSTAT register ... The LFCLK will run, but only source the WDT. In order for the RTC to use it, you must start the LFCLK."

This seems to be the same situation as having started the WDT before configuring the LFCLK.

Essentially I want to know two things:

• Does "the watchdog will automatically force the 32.768 kHz RC oscillator on as long as no other 32.768 kHz clock source is running"  mean 'the internal RC will be used to clock the WDT only, until you configure LFCLKSRC to be something else and trigger TASKS_LFCLKSTART, at which point LFCLK will be used to drive the WDT'?
• Does the LFCLK source persist across a soft reset when the WDT forces it to stay active, or does it revert to using the internal RC?

Apologies if this has been answered elsewhere.

Thanks,

Matt

[bjorn-spockeli]

 

 

• Does "the watchdog will automatically force the 32.768 kHz RC oscillator on as long as no other 32.768 kHz clock source is running"  mean 'the internal RC will be used to clock the WDT only, until you configure LFCLKSRC to be something else and trigger TASKS_LFCLKSTART, at which point LFCLK will be used to drive the WDT'?

The LFCLK can have two sources, the internal RC oscillator (LFRC)or an external crystal oscillator (LFXO). If you have nRF52 design without the external crystal, then the LFRC will be used to clock all peripherals that are active and requesting the LFCLK. 

If its a design with an external crystal and that is configured as the LFCLK source, but no other peripheral is using the LFCLK, then the WDT will use the LFRC and not the LFXO. If a peripheral requests the LFCLK, then the LFXO will start and that will be the LF clock source for both the WDT and the peripheral. 

Does the LFCLK source persist across a soft reset when the WDT forces it to stay active, or does it revert to using the internal RC?

As the CLOCK is a peripheral and a SoftReset will reset the Peripheral registers, then I beleive that the LFCLK will revert to the RC configuration post a SoftReset.

 Best regards

Bjørn