nRF9160 number of simultaneous SPI, I2C and UART

[Antoine_M-L]

Hi,

In order to be absolutely sure, can you confirm me that the nRF9160 module can be configured with following interfaces running simultaneously, all with dedicated GPIO pins:

- 4 x SPI master (= 12 GPIO pins)

- 4 x I2C (= 8 GPIO pins)

- 4 x UART (= 8 GPIO pins)

I think it's possible, since the instantiation of the memory given in the datasheet show that each of the 12 mentionned interface (4xSPIM, 4xI2C, 4xUART) are instantiated separately. But if I remember it was not the case on the nRF52840, so just to have a confirmation for the nRF9160.

Thanks for your help !

Best regards,

Antoine

[Håkon Alseth]

Hi Antoine,

 

There are shared resources in the nRF9160, like described here:

https://infocenter.nordicsemi.com/topic/ps_nrf9160/twim.html?cp=2_0_0_5_16_0#concept_efd_mxp_xr

If you follow the link to the registers, you can see that each instance of TWIM/TWIS/SPIM/SPIS/UARTE share the same base address. This means that if you want to have 1 x SPIM, 1 x TWIM, and 1 x UARTE, these must all be on different instances, ie:

SPIM0

TWIM1

UARTE2

 

Kind regards,

Håkon

[Antoine_M-L]

Hi Håkon,

Thanks for your reply, it's more clear for me now.

So it's mean that I was wrong, since on the nRF9160 we can use only 4 communication bus (SPI/I2C/UART) simultaneously, which correspond to the 4 separate base addresses.

So thanks for your answer, it was very helpful.

Have a nice day, and best regards,

Antoine

[Håkon Alseth]

Hi Antoine,

 

Antoine_M-L said:

So it's mean that I was wrong, since on the nRF9160 we can use only 4 communication bus (SPI/I2C/UART) simultaneously, which correspond to the 4 separate base addresses.

So thanks for your answer, it was very helpful.

Glad to be able to help you out. Let us know if you have any other questions or issues.

 

Kind regards,

Håkon