I use the SPIM to access a nand flash memory device. There are times, when I need to "free" the SPI bus allocated by the nRF52840, so that another CPU can access the memory device.
This basically works,- my problem is that the nrfx_spim_uninit function does not uninitialize most of the GPIO PINs forming the SPI bus.
When looking at the SDK source code of the functions
nrfx_spim_init
nrfx_spim_uninit
my understanding is that the functions are simply not symmetrical and that nrfx_spim_uninit does not care about the configuration for the GPIO pins for CLOCK , MOSI and CS, which where set to outputs by nrfx_spim_init. As a result they will be still outputs after nrfx_spim_uninit and thus "block" the bus.
I also verified this by just looking at the status of the SPI (GPIO) pins before and after the function calls.
Only the MISO GPIO pin is set back to its default within the nrfx_spim_uninit function.
from nrfx_spim.c, function nrfx_spim_uninit
if (p_cb->miso_pin != NRFX_SPIM_PIN_NOT_USED)
{
nrf_gpio_cfg_default(p_cb->miso_pin);
}
This is how I initialize the SPIM
nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG; spi_config.ss_pin = FLASH_SS_PIN; spi_config.miso_pin = FLASH_MISO_PIN; spi_config.mosi_pin = FLASH_MOSI_PIN; spi_config.sck_pin = FLASH_SCK_PIN; spi_config.frequency = NRF_DRV_SPI_FREQ_4M; spi_config.mode = NRF_SPI_MODE_0; nrf_drv_spi_init(&drv_spi_Flash, &spi_config, NULL, NULL);
I will solve this problem by deinitializing these GPIO pins myself, setting them back to power on defaults, just like the SDK does this for the MISO pin.
However I wonder whether the current implementation of nrfx_spim_uninit is incomplete/buggy or whether there is another function which I should use ?
