Hi,
Having gone through the nRF52832 datasheet, the only discernible drawbacks of moving from an external crystal to synthesizing the Low frequency clock from the high-frequency clock appears to be:
- increase in run current from 0.25uA to 100uA
- an additional 8ppm of tolerance on the clock
Based on the requirements of the clocks for system performance that additional 8ppm doesn't appear to be problematic unless the ANT stack is used (it isn't).
Am I missing any drawbacks here?