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nRF9160 VDD and VDD_GPIO tied to same voltage rail, 3.3V

Hello,

there’s a section in the NRF9160 specification (11.1) that calls out that VDD_GPIO should be applied after VDD has been applied on power up and VDD_GPIO should be removed before VDD on power down.

If I’m driving these both at 3.3V, can I tie the two rails together without having to worry about the power up/power down power sequencing?

I assume the PMU will take care of the power sequencing.  can you please verify and expand if there will be any issues?

Thanks,

Belenie

 


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