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nRF24AP2 as master in a SPI bus

Hello, I would like to use nRF24AP2 in a SPI bus with an accelerometer (a slave peripheral). I need that the host works as master with accelerometer. But in this way we will have two masters on the bus (ANT module and Host). How can I set the clock line of ANT in high impedance without using the reset? If I don't put low the signal SRDY, the clock line of ANT is in high impedance? If so, I could use the host clock as an output.

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