nrf52 Easy DMA and critical section

[Riccardo78]

Dear Sir/Madam,

My question regards the behavior of the EasyDMA during the transfer of data to / from a serial peripheral like SPI or UART.

Let's suppose that during the above operation, a critical section is entered. What is the behavior of the EasyDMA ? Does the transfer continue when the critical section is active ?

Thanks in advance for the support.

Kind regards

Riccardo Gaiati

[Dmitry]

Hello,

EasyDMA is a bus master and works independently of CPU. Transfer will continue when the critical section is active.

[Riccardo78]

Hi,

Thanks for the reply.

Kind regards

Riccardo