Hi all,
I need to be able to reprogram an nRF52832 on a daughterboard from a mainboard with a Cortex M7. I have been able to eraseall and reprogram the nRF52, but it seems that about 50% of the time either the write or read-back I do to verify fails.
Wondering if someone can tell me if my order of operations on the SWD-DP is correct. I have referred to the blog post here: https://devzone.nordicsemi.com/nordic/nordic-blog/b/blog/posts/serial-wire-debug-port-interface-for-nrf52832?CommentSortBy=CreatedDate&CommentSortOrder=Descending.
My steps are:
1) Reset SWJ link and select the SWD-DP.
2) Read SWD-DP ID expecting 0x2BA01477
3) Write 0x0 to DP.SELECT // Select AHB-AP
4) Write 0x50000000 to DP.CTRL/STAT // Request debug and sys powerup
5) Write 0x23000052 to AHB-AP.CSW
6) Write 0xa05f0003 to the DHCSR register of the ARM core through the AHB-AP.
7) Read back DHCSR expecting bit 0 and 1 to be high. // Ensure target is halted.
8) Switch to CTRL-AP and write to ERASEALL
9) Poll ERASEALL_STATUS
10) Switch back to AHB-AP
11) Write to NVMC.CFG to enable writing.
12) Write in 512 byte chunks using following:
12a) Poll NVMC.ready to ensure no on-going writes
12b) Write to TAR
12c) Write to DRW
12d) Read RDBUFF
13) Poll NVMC.ready until it's idle.
13) Read 512 byte chunks
Does this look correct? I feel like my issue is a timing thing since it works ~50% of the time. I am wondering if I'm failing the writes because the AHB-AP is ACKing the write transactions but the NVMC isn't actually capable of writing that word yet. Is there a bit flag or something that I should be checking but am not checking?
