NRF52840 and low power PDM interface

[kimladha2]

Hi,

I'm making a new design. I want to use the NRF52840. I also want a low power microphone interface.

PDM seems like a good idea, modern PDM mics have low power modes at reduced clock rates with currents much less than 300uA.

The NRF52840 has a PDM input but it appears to have two obstacles preventing it working for my application based on all the information I could find:

1) It doesn't support low power modes with reduced clock frequency.

I found information related to increasing the clock rate. But I need to reduce the clock rate to ~750kHz for devices like the  SPH0641LM4H-1

2) It only supports clock generation from the HFCLK

I think this means the power consumption will be much higher than I need since the HFCLK is power hungry and requires continuous power for the PDM to work. A possible workarround would be to enable an external clock or to be able to use the LFCLK as the clock generator (albeit at a fixed 1MHz)

Please can someone confirm the limitations or provide a work-around or clarification?

Thanks

Karim

[bjorn-spockeli]

Hi Karim

1) It doesn't support low power modes with reduced clock frequency.

I found information related to increasing the clock rate. But I need to reduce the clock rate to ~750kHz for devices like the  SPH0641LM4H-1

Only the values listed in the PS have been fully and thoroughly tested. If you are using values that are not listed in the PS, we cannot guarantee that they will work and it will be on your own risk.

With that said, you should be able to set the clock to a different frequency, e.g. PDM_CLK = 32 MHz / 26 = 1.231 MHz -> use NRF_PDM->PDMCLKCTRL = 0x09800000; before you start the PDM.

But, you will not be able to fine adjust the clock frequency, since the PDM clock generator does integer division based on the HFCLK. You can therefore not set the PDM clock 100% freely.

2) It only supports clock generation from the HFCLK

I think this means the power consumption will be much higher than I need since the HFCLK is power hungry and requires continuous power for the PDM to work. A possible workarround would be to enable an external clock or to be able to use the LFCLK as the clock generator (albeit at a fixed 1MHz)

 As far as I know it is not possible to configure the PDM peripheral to use another clock source than the HFCLK. 

Best regards

Bjørn