how to porting priority-based scheduling(non-preemptive, QV kernel)

[stevenlin]

hi all

i want porting qpc with softdevice. it need set SCB_SYSPRI exception priorities with PRIMASK bit or the BASEPRI register for critical section

can anyone give me advised

that SoftDevice takes all the interrupt, the qpc framework it is superloop to execute handle(Privileged Handler mode)

(To avoid race conditions between the main loop and the interrupts)

The cooperative QV kernel works essentially as the traditional foreground-background system (a.k.a. "superloop") in that all active objects are executed in the main loop and interrupts always return back to the point of preemption. To avoid race conditions between the main loop and the interrupts, QV briefly disables interrupts.

ref qp discussion , 

https://sourceforge.net/p/qpc/discussion/668726/thread/d71eca19/?limit=25

ref about : qpc(qv)

https://www.state-machine.com/qpcpp/arm-cm_qv.html

[Håkon Alseth]

Hi,

 

 

i want porting qpc with softdevice. it need set SCB_SYSPRI exception priorities with PRIMASK bit or the BASEPRI register for critical section

 That looks like a suggestion, rather than a hard requirement. Its a port file, so you can port that as you'd like (but keep the OSes interrupts in a certain order), as long as you do not touch the softdevice interrupts or any peripherals that it uses, that should be fine (This includes not using global interrupt enable/disable functions). Please also note that there are certain interrupt levels that are not available to the application, as the softdevice uses them: https://infocenter.nordicsemi.com/topic/sds_s132/SDS/s1xx/processor_avail_interrupt_latency/exception_mgmt_sd.html?cp=4_5_2_0_15_1

For interrupt disable/enable use the CRITICAL_SECTION_ENTER() / _EXIT() macros, that enable/disable the application interrupts rather than all interrupts.

 

Kind regards,

Håkon