DCDCEN0 value isn't retained after reset

[Umamaheswara Rao Lankoti]

We have a custom board based on nRF52840. Programming it through external SEGGER interface (P20) available on nRF52840 DK.

Our custom board is designed to use the DC-DC converters. So following changes were made.

1. Set REGOUT0 with 1.8V
2. Enable DCDCEN (Enable DC/DC converter for REG1 stage)
3. Enable DCDCEN0 (Enable DC/DC converter for REG0 stage)

Its similar to High Voltage mode, DC/DC for REG0 and REG1 enabled regulator configuration. Circuit configuration followed is similar to Config-4 in Reference Circuitry as mentioned in nRF52840 Product Specification 1.0 document.

To configure the above settings, wrote below script which run on JLinkExe SWD interface.

selemu
Device nrf52840_xxaa
speed 500
mem 0x10001304,8
mem 0x40000578,1
mem 0x40000580,1
w4 4001e504 1
w4 10001304 FFFFFFF8
w4 40000578 1
w4 40000580 1
Sleep 1000
mem 0x10001304,8
mem 0x40000578,1
mem 0x40000580,1
rx 300
g
qc

DCDCEN register is 0x40000578 and DCDCEN0 register is 0x40000580.

After reset, register DCDCEN0 contents got reset to 0.

Could you please help check if any step is missed in configuration script.

[Andreas]

Hi,

 

Neither DCDCEN nor DCDCEN0 are retained registers, meaning they are reset to their reset value when the SoC is reset, no matter the reset source. You need to write to this register again after reset, if you do so early in the application it will behave more or less as if it was not erased.

 

The reference design configurations with DCDC converter does not automatically enable the DCDC converter, it just allows you to do so in your code without bricking the SoC.

 

Best regards,

Andreas

[Umamaheswara Rao Lankoti]

Hi Andreas,

But DCDCEN register retains the value. Only DCDCEN0 value isn't retained.

What are the default values of these registers ?

thanks,
Uma..

[Andreas]

Hi,

 

And you are sure there is no application running on the device that is setting this bit on startup, or something similar to that? I ran your commands on a blank nRF52840, behaviour as specified, both registers are cleared.

Default values are 0 in both, see the 'reset value' description.

 

Best regards,

Andreas

[Umamaheswara Rao Lankoti]

Hi Andreas,

You are correct. On blank device, both the registers are disabled.

Looks like the DCDCEN is setting to 1 because of CONFIG_SOC_DCDC_NRF52X is set to y. I have created Kconfig for the custom board as

config BOARD_ENABLE_DCDC
        bool "Enable DCDC mode"
        select SOC_DCDC_NRF52X
        default y

With below change, able to see DCDCEN and DCDCEN0 registers are enabled when the application is loaded.

diff --git a/soc/arm/nordic_nrf/nrf52/soc.c b/soc/arm/nordic_nrf/nrf52/soc.c
index aa00eaf..38b9fbd 100644
--- a/soc/arm/nordic_nrf/nrf52/soc.c
+++ b/soc/arm/nordic_nrf/nrf52/soc.c
@@ -67,6 +67,7 @@ static int nordicsemi_nrf52_init(struct device *arg)
 
 #if defined(CONFIG_SOC_DCDC_NRF52X)
        nrf_power_dcdcen_set(true);
+    nrf_power_dcdcen_vddh_set(true);
 #endif
 
        _ClearFaults();

Is it good to make such change in soc.c ? If yes, I will create another config and call nrf_power_dcdcen_vddh_set(true) when the config is defined for the board or application. 

Note: I am using Zephyr code base.

thanks,
Uma..