ESD protection for SWD

[Deimantas]

Hi,

Need ESD protection recommendation for NRF51822. While testing nrf51822, we noticed that when SWDCLK gets static dicharge over 900 V, nrf51822 reboots and current consumption increases to ~1.2 mA or only current consumption increases to ~1.2 mA. Found out that in such case, nrf51822, goes to debug mode, and thats why current consumption increases.

Is there any way to detect from application that nRF51822 is in debug mode? Or maybe there is other way to solve this? 470ohm resistor to ground on SWDCLK doesn't help. Nnly helps when SWDCLK connected to ground directly or with 0R resistor, but then we can't program nrf51822.

[Asbjørn]

You could tie the pin directly to ground on the final product. During development you could have a different implementation/component that would allow you to program the chip. That would allow you to develop normally and also replace the component to ground if you feel that is necessary for the application.

[Locky]

This would eliminate the ability to program the chip on-board though, no?

DiamondS: Is this something you are seeing while the product is inside an enclosure?

[Asbjørn]

Yes, if you use a 0 Ohm resistor. The idea was to replace that resistor while developing with a capacitor or remove it altogether.

[Deimantas]

Now i see that, 0R resistor not always helps. But it reduces the posibility of increased current consumption. 0R resistor isn't best case, because during manufactoring, after device testing, you should solder a resistor. So production becomes more complex.

[Asbjørn]

Yes, as you say, it will make the production for your application more complex. Are you sure that a 900V discharge directly on the SWDCLK pin is something that could potentially happen to you application? Usually the housing or encapsulation will be hit, but not necessary directly on the SWCLK pin itself.