Bootloader taking higher current consumption upon power on

[Jay_Shah]

Misc info:

1.  SDK Version: v15.3

2.  SD: 6.1.1

3.  Toolchain: IAR v7

I'm trying to use secure_bootloader from the examples but it's taking higher current upon power on. 

Our intention is to integrate the bootloader with the soft device+application but higher current consumption is an issue.

Please check the attached images which we got from PPK.

Can you please help me out on this?

[Kenneth]

The bootloader will do some checksum calculation that take some time during boot,the time will depend on the size of the application, this is a one time operation when chip is powered, and I think it is reasonable to check integrity of the application firmware. You can skip the integrity check for instance when wakeup from system OFF reset:

https://infocenter.nordicsemi.com/index.jsp?topic=%2Fsdk_nrf5_v16.0.0%2Flib_bootloader.html&cp=5_1_3_5_0_3&anchor=lib_bootloader_app_start

[asr]

Hi Kenneth,

I did Skip the integrity check ( system OFF reset ) in sdk_config.h file by disabling the below configuration.

// <i> Only CRC checks can be skipped. For other boot validation types, the reset state is ignored.

#ifndef NRF_BL_APP_CRC_CHECK_SKIPPED_ON_SYSTEMOFF_RESET
#define NRF_BL_APP_CRC_CHECK_SKIPPED_ON_SYSTEMOFF_RESET 0
#endif

still I see it drawing higher current.

From the above PPK screenshots, when I do power cycle I noticed that for the duration of around 300ms drawing current about 6-7mA. In the second image about 90ms average current is around 7mA. Can I know what are these bust transactions that we noticed in above PPK screens even after disabling integrity check.

Regards,

asr

[Kenneth]

If you are using an external 32kHz crystal the startup time may for instance be around 300ms, so that may be the first (typical 0.25sec):
https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/clock.html?cp=4_2_0_18_3_3#unique_1385509760 

If you erase an flash page, then that can take around 90ms (max 89.7ms):
https://infocenter.nordicsemi.com/topic/com.nordic.infocenter.nrf52832.ps.v1.1/nvmc.html?cp=4_2_0_10_7_0#unique_156661312 

[asr]

We flashed bootloader+softdevice (*.hex) image using the J-link commander. Then we flashed the application (*.zip) image using the "nrf Toolbox" by using the DFU option. I flashed above images on the Nordic nrf52832 DK board and connected the PPK and captured the above screens. I see both the bulk transactions all the time whenever I do powercycle. In the dfu example we just disabled  integrity check ( system OFF reset ) that all. No more changes.

With above reply I can conclude that I can't minimize or avoid both the burst transactions(300ms & 89ms) right?

Regards,

asr.

[Kenneth]

I assume you may reduce the time by using the internal 32kHz RC oscillator instead of the external 32kHz. But do you expect your product to be power cycled frequently?

300ms @ 7mA equal about 200-300 advertising events, unless you power cycle your product many times a day I doubt it will have any impact on the battery life time.

[Jay_Shah]

Hi Kenneth,

why is it the case that I don't see the crystal stabilization time in my application? The pattern in the attached image is the only thing I see when my application runs on the board. 

Why is the initialization behavior different for bootloader and the application? 

P.S.: The attached image is the capture of Softdevice + Application, no bootloader is present in it. 

[Kenneth]

I think we can conclude that it is the way it is in this case. A power cycle it not something we expect happen often, it should really only occur when replacing batteries, in which case doing a integrity check of the firmware make sense.

It could be interesting to know if you have enabled the softdevice in the bootloader and application with the same LFCLK (32kHz clock source).