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Minimum and maximum frequency generation on nRF51822 GPIO?

I'd like to know what is the minimum and maximum frequency I can generate on a GPIO with a 50% duty cycle (+/-10% at the worst case). Which resources should I use for that purpose? Let's assume a 16 MHz crystal input to the nRF51822.

(The application is driving a digital-output (PDM) MEMS microphone, that requires a clock between 1 -- 3.25 MHz.)

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  • I would think that the theoretical maximum frequency would be achieved by toggling the GPIO when the timer counter reaches a count of 1, and clearing the counter at this time. That would produce a 50% duty cycle clock at 8MHz, if the counter is clocked from the system clock. You need to use a hardware timer/counter, a PPI channel and a GPIOTE task. Take a look at the PWM example on github for more info.

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  • I would think that the theoretical maximum frequency would be achieved by toggling the GPIO when the timer counter reaches a count of 1, and clearing the counter at this time. That would produce a 50% duty cycle clock at 8MHz, if the counter is clocked from the system clock. You need to use a hardware timer/counter, a PPI channel and a GPIOTE task. Take a look at the PWM example on github for more info.

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