Is it possible to operate SPI slave in a way DMA generates END event when given number of bytes is transferred ?

[maki]

In my case active CE signal defines byte boundaries - for each byte individually.
From what I see, DMA seems to stop on rising edge of CS regardless what is declared in MAXTX, MAXRX. So assuming that semaphore is in a SPI state, start of DMA transaction is determined by falling edge of CS and end of DMA transaction is determined by rising edge of CS.

[maki]

Hi,

You are right - it is not possible, but only when using documented hardware. I have been discussing it internally with SAG. The bottom line is, that SPI-BUS transaction (CE low, SOME DATA, CE high) is also SPI-DMA transaction. Regarding CS, this line is driven by SPI master and slave only can respond to the state of the line. Regarding serialization code, SPI_RAW, SPI_5W uses extended hardware (/REQ, /RDY) to implement packet protocol - this is not standard SPI bus implementation. My case is different, I am using SPI slave to interface I2S device. Thanks, anyway...