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NRF51 design/layout questions

We are currently using a NRF51 module (HRM1017) for a device in production. We want to migrate to the latest version of NRF51822 and move away from using a module to having all the parts directly on the PCB. Due to limited PCB real estate, we are considering the WLCSP version.

A few questions:

  1. Looking at the reference layout for CxAx (nRF51x22-CxAx Reference Layout 1_3), you use micro vias in pads for the chip itself, but regular vias for the rest. It seems like a bit of a strange choice since you use HDI tech anyway and the point of this package is to get a smaller design. If we pack it tighter and use microvias for everything, is there anything we should keep in mind?

  2. What are the implications of leaving out the "optional" RTC crystal, from a BLE perspective? We're not using it for anything else.

  3. When using a balun instead of a matching network, we can't trim it as a part of improving RF performance with our particular antenna, enclosure etc. In your opinion, how big a problem is this?

  4. The ref design doesn't have any shielding box. The top layer is rather "busy" with a lot of IO (as is our design). Do you have any guidelines on how to place and connect a shielding box into your reference design? How big a problem is it if we leave it out altogether? Our device has a plastic enclosure.

  5. It looks like the 256k versions of the WLCSP package (CEAA and CFAC) are footprint compatible and only differ in the size of the package itself. Is this correct, ie can we layout for CFAC and later drop in a CEAA if we don't need the extra RAM?

Best, Jon