SPI interface slave select line and its high and low level timings

[Charu]

Hi,

I was working with the SPI interface of nrf52DK microcontroller boards and wanted to know if there is a way to change the timings of the low and high levels of the Slave Select (SS) lines. For initial purposes, I am using the SCLK at 125kHz and I checked the signals on an oscilloscope. I have a few questions here.

- The SS line is automatically generated based on the SCLK clock. Is there a way to control the firing of the SS line?

- The oscilloscope shows that for SCLK at 125kHz, the low level time of SS line is 165us whereas the high level time is quite long (of the order of 200ms). This effectively is increasing the time period of the SS line and is also reducing the data transfer rate on the MISO/MOSI lines. The low level time changes if the SCLK frequency is changed but the high level time remains of the order of 200 ms.

Is there a way to control/change the high level time of the SS lines?

Any suggestions or pointers will be helpful.

Thanks

[Kenneth]

What example are you working on? The default example in nRF5 SDK is:
\nRF5_SDK_16.0.0_98a08e2\examples\peripheral\spi

Then the SS is handled by the driver if spi_config.ss_pin != NRF_DRV_SPI_PIN_NOT_USED.

If spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED, then you can can set and clear a GPIO directly in the application to act as a SS pin before and after calling nrf_drv_spi_transfer().

Best regards,
Kenneth