Accessing aQFN73 inner pins for two layers PCB design

[Mishka]

Hello,

I'm developing a coin-sized board based on the nRF52840 and the nRF52833 in aQFN73 package. The PCB has only two layers with the bottom layer dedicated to ground plane with CR2032 battery attached directly to it. For this reason the board has no routing beneath the chip, and there are no internal layers.

The stackup is nearly good, but the device do miss the reset pin. The AC13 pin is located on an inner row and route it out of its location is tricky. In attempt to address it somehow I've drooped number of inner pins and guided the track (SW2_RESET on the picture) like this:

Need your expert advice, is this idea any good? If not, what might be a better option?

Thanks!

-- Mishka

[Marjeris Romero]

Hi Mishka,

Sorry for the late reply. About the coin cell placement, you only need to make sure that there is solid ground right under the chip, so between the chip and the coincell, as long as this ground requirement from the reference design is met there is no problem in having a 2 layer design.

And it's OK to route reset that way as well. Alternatively you could route it through a GPIO pin that is not in used.

If you want you can send your schematic and layout file for a review in a private devzone ticket before ordering prototypes.

Best regards,

Marjeris

[Mishka]

Hi Marjeris,

thank you for the clarification! While bypassing some outer GPIO pins looked relatively fair, I was not sure about routing the trace along the chip perimeter.

The PCB in subject is the Raybeacon wearable development board. I'm trying to keep it full-featured yet affordable, hence the only two layers design. It was reviewed already and now thanks to this ticket it has got hardware reset linked to a button (not a big deal when attached to SWD, but I admit quite handy on the go).

Thanks a lot for the outstanding support, highly appreciate it!

Sincerely yours,
Mishka