Custom Synchronous Communication Protocol

[Sava]

Hi,

I'm developing firmware for the trf7970a nfc chip. For standard communication the chip uses spi, but a special direct mode uses an additional two wire interface where the chip generates the clock signal. The clock signal starts after TX enable is pulled high and the nrf52 has to immediately start transmitting data in sync with the clock.

I tried using a gpio in event interrupt on the clock low to high transition to trigger the data line, but the response is too slow.


I'm not sure where to start for implementing a better approach. Can PPI be used for this? Can the TWIS library can be modified for this task?

Thanks,

Sava

[Sava]

Hi Jared,

The clock signal is generated by the nfc chip. Can I use GPIOTE and PPI to synchronize the data line with the clock low-to-high transition?

[Sava]

Hi Jared,

Sorry for my poor explanation of the problem. Each bit on the tx data line has to be set after the bit clock goes low to high as shown in the picture below. As stated, the clock is generated by another chip therefore using the spim library wouldn't be possible.


Thanks,

Sava

[Jared]

I'm sorry for the misunderstanding. GPIOTE task is not appropriate for this as it will only do simple tasks. To be honest, I'm not sure if this is as trivial as I first thought An alternative could be to use the PWM peripheral to drive the data line but i'm not sure if this is a good solution either as it might be a bit complicated to implement. If SPI is an alternative then I would suggest going for that one..